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Volumn E81-A, Issue 8, 1998, Pages 1667-1675

Dedicated design of motion estimator with bits truncation fast algorithm

Author keywords

Bits truncation; HDTV; Motion estimation; MPEG; MSPA; VLSI

Indexed keywords

ALGORITHMS; COMPUTER HARDWARE; DESIGN; MICROPROCESSOR CHIPS; PERFORMANCE; VLSI CIRCUITS;

EID: 0032137808     PISSN: 09168508     EISSN: None     Source Type: Journal    
DOI: None     Document Type: Article
Times cited : (2)

References (14)
  • 7
    • 33746468510 scopus 로고    scopus 로고
    • Ph.D. Thesis, Dept. of EE., Tokyo Institute of Technology, March 1998.
    • D. Li, "VLSI Memory Sharing Processor Array," Ph.D. Thesis, Dept. of EE., Tokyo Institute of Technology, March 1998.
    • "VLSI Memory Sharing Processor Array,"
    • Li, D.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.