A Family of VLSI Designs for the Motion Compensation Block-Matching Algorithm

IEEE Transactions on Circuits and Systems

Volumn 36, Issue 10, 1989, Pages 1317-1325

  Yang, Kun Min ^a   Sun, Ming Ting ^a   Wu, Lancelot ^a  

^a TELCORDIA TECHNOLOGIES   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER PROGRAMMING--ALGORITHMS;

APPLICATION SPECIFIC INTEGRATED CIRCUITS; BLOCK MATCHING ALGORITHM; CHIP-PAIR DESIGN; MOTION COMPENSATION; MOTION VECTORS; VLSI ARCHITECTURES;

INTEGRATED CIRCUITS, VLSI;

EID: 0024755322     PISSN: 00984094     EISSN: None     Source Type: Journal    
DOI: 10.1109/31.44348     Document Type: Article

References (12)

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9. K.M. Yang, M.T. Sun, and L. Wu, “A family of VLSI designs for motion compensation block-matching algorithm,” Bellcore Tech. Memo. TM-ARH-012687, Oct. 1988.
10. M.T. Sun and K.M. Yang, “A flexible VLSI architecture for full-search block-matching motion-vector estimation,” in Proc. IEEE Int. Symp. on Circuits and Systems, Portland, OR, May 9–11, 1989.
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