메뉴 건너뛰기




Volumn 44, Issue 12, 1997, Pages 2281-2289

A floating-gate mos learning array with locally computed weight updates

Author keywords

[No Author keywords available]

Indexed keywords

ERROR ANALYSIS; GATES (TRANSISTOR); MATRIX ALGEBRA; VECTORS;

EID: 0031340544     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/16.644652     Document Type: Article
Times cited : (49)

References (18)
  • 1
    • 33747730638 scopus 로고    scopus 로고
    • A semiconductor structure for long term learning U.S. Patent 5627392 May 6 1997.
    • C. Diorio P. Hasler B. A. Minch and C. Mead A semiconductor structure for long term learning U.S. Patent 5627392 May 6 1997.
    • Diorio, C.1    Hasler, P.2    Minch, B.A.3    Mead, C.4
  • 18
    • 33747658812 scopus 로고    scopus 로고
    • Foundations of learning in analog VLSI Ph.D. thesis Dept. Computation and Neural Systems CIT Pasadena CA 1997.
    • P. Hasler Foundations of learning in analog VLSI Ph.D. thesis Dept. Computation and Neural Systems CIT Pasadena CA 1997.
    • Hasler, P.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.