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Volumn 8, Issue 1, 1995, Pages 83-114
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An analytical MOS transistor model valid in all regions of operation and dedicated to low-voltage and low-current applications
a a a
a
EPFL
(Switzerland)
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Author keywords
device modeling; low current; low voltage; MOS transistor
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Indexed keywords
CAPACITANCE;
ELECTRIC CHARGE;
ELECTRIC CURRENTS;
ELECTRIC NETWORK ANALYSIS;
ELECTRIC NETWORK SYNTHESIS;
FUNCTIONS;
GATES (TRANSISTOR);
INTERPOLATION;
SEMICONDUCTOR DEVICE MODELS;
SPURIOUS SIGNAL NOISE;
THERMAL NOISE;
TRANSCONDUCTANCE;
QUASI-FERMI POTENTIALS;
SMALL SIGNAL MODEL;
TRANSADMITTANCES;
MOSFET DEVICES;
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EID: 0029342165
PISSN: 09251030
EISSN: 15731979
Source Type: Journal
DOI: 10.1007/BF01239381 Document Type: Article |
Times cited : (951)
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References (27)
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