Analysis of emitter efficiency enhancement induced by residual stress for in situ phosphorus-doped polysilicon emitter transistors

IEEE Transactions on Electron Devices

Volumn 44, Issue 6, 1997, Pages 978-985

  Kondo, Masao ^a   Shiba, Takeo ^a   Tamaki, Yoichi ^a  

^a HITACHI LTD   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

AMORPHOUS FILMS; EPITAXIAL GROWTH; INTERFACES (MATERIALS); PHOSPHORUS; POLYCRYSTALLINE MATERIALS; RESIDUAL STRESSES; SEMICONDUCTING SILICON; SEMICONDUCTOR DOPING; STRESS ANALYSIS;

EMITTER EFFICIENCY ENHANCEMENT;

BIPOLAR TRANSISTORS;

EID: 0031169861     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/16.585554     Document Type: Article

References (12)

1. M. Kondo, M. Nanba, T. Kobayashi, S. Iijima, and T. Nakamura, "An ultra-high emitter efficiency transistor with a low-temperature processed polysilicon emitter for high-speed bipolar ULSI's," in Symp. VLSI Technol., 1991 p. 65.
2. CEO Si bipolar transistor using in situ phosphorus-doped and large-grained polysilicon emitter contacts," IEEE Trans. Electron Devices, vol. 40, p. 1563, 1993.
3. M. Kondo, T. Kobayashi, and Y. Tamaki, "Hetero-emitter-like characteristics of phosphorus doped polysilicon emitter transistors-Part I: Band structure in the polysilicon emitter obtained from electrical measurements," IEEE Trans. Electron Devices, vol. 42, p. 419, 1995.
4. _, "Hetero-emitter-like characteristics of phosphorus doped polysilicon emitter transistors - Part II: Band deformation due to residual stress in the polysilicon emitter," IEEE Trans. Electron Devices, vol. 42, p. 427, 1995.
5. T. Uchino, T. Shiba, T. Kikuchi, Y. Tamaki, A. Watanabe, Y. Kiyota, and M. Honda, "15-ps ECL/74-GHz fT Si bipolar technology," in IEDM Tech. Dig., 1993, p. 67.
6. T. Shiba, M. Kondo, T. Uchino, H. Murakoshi, and Y. Tamaki, "Effect of rapid epitaxy in situ phosphorus-doped polysilicon emitter on current-gain of bipolar transistor," IEEE Trans. Electron Devices, vol. 43, p. 1281, 1996.
7. H.C. de Graaff and J. G. de Groot, "The SIS tunnel emitter: A theory for emitters with thin interface layers," IEEE Trans. Electron Devices, vol. ED-26, p. 1771, 1979.
8. A. Neugroschel, M. Arienzo, Y. Komen, and R.D. Isaac, "Experimental study of the minority-carrier transport at the polysilicon-monosilicon interface," IEEE Trans. Electron Devices, vol. ED-32, p. 807, 1985.
9. T. Kobayashi, S. Iijima, S. Aoki, and A. Hiraiwa, "Novel highly conductive polycrystalline silicon films reducing processing temperature down to 650 °C," in Ext. Abstr. 20th CSSDM.p. 57, 1988.
10. 4 atmosphere," in Ext. Abstr. 24th CSSDM.p. 17, 1992.
11. E.P. Keyes and N. G. Tarr, "Superbeta polysilicon emitter transistors," IEEE Electron Device Lett., vol. EDL-8, p. 312, 1987.
12. G.P. Li, C. T. Chuang, T. C. Chen, and T. H. Ning, "On the narrow-emitter effect of advanced shallow profile bipolar transistors," in IEDM Tech. Dig., 1987, p. 175.