Specification and analysis of timing constraints for embedded systems

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 16, Issue 3, 1997, Pages 240-256

  Gupta, Rajesh K ^a   De Micheli, Giovanni ^b  

^a UNIVERSITY OF CALIFORNIA   (United States)

^b Stanford University   (United States)

Author keywords

Constraint analysis; Constraint satisfiability; Embedded systems; Interactive analysis; Rate constraints; Relative rates; Timing analysis

Indexed keywords

ALGORITHMS; COMPUTER AIDED LOGIC DESIGN; CONSTRAINT THEORY; MATHEMATICAL MODELS; RESPONSE TIME (COMPUTER SYSTEMS); STATISTICAL METHODS; SYNCHRONIZATION;

EMBEDDED SYSTEMS; SOFTWARE PACKAGE VULCAN; TIMING ANALYSIS;

INTERACTIVE COMPUTER SYSTEMS;

EID: 0031095940     PISSN: 02780070     EISSN: None     Source Type: Journal    
DOI: 10.1109/43.594830     Document Type: Article

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