High-speed and low-power interconnect technology for sub-quarter-micron ASIC's

IEEE Transactions on Electron Devices

Volumn 44, Issue 2, 1997, Pages 250-256

  Miyamoto, Masafumi ^a,b   Takeda, Toshifumi ^b   Furusawa, Takeshi ^b  

^a IEEE   (Japan)

^b HITACHI LTD   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITANCE; COMPUTER AIDED DESIGN; ELECTRIC INSULATORS; ELECTRIC RESISTANCE; FABRICATION;

INTERCONNECT STRUCTURE; SPIN ON GLASS; WIRING CAPACITANCE; WIRING RESISTANCE;

APPLICATION SPECIFIC INTEGRATED CIRCUITS;

EID: 0031079047     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/16.557712     Document Type: Article

References (10)

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