Planarized multilevel interconnect scheme with embedded low-dielectric-constant polymers for sub-quarter-micron applications

Digest of Technical Papers - Symposium on VLSI Technology

Volumn , Issue , 1994, Pages 73-74

  Jeng, Shin Puu ^a   Chang, Mi Chang, ^a   Kroger, Tara ^a   McAnally, Peter ^a   Havemann, Robert H ^a  

^a TEXAS INSTRUMENTS   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITANCE; ETCHING; HEAT TRANSFER; POLISHING; POLYMERS; RELIABILITY; SEMICONDUCTING SILICON COMPOUNDS;

CHEMICAL MECHANICAL POLISH; PLANARIZED MULTILEVEL INTERCONNECT SCHEME;

DIELECTRIC MATERIALS;

EID: 0028594131     PISSN: 07431562     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (2)