EMI effects and timing design for increased reliability in digital systems

IEEE Transactions on Circuits and Systems I: Fundamental Theory and Applications

Volumn 44, Issue 2, 1997, Pages 130-142

  Chappel, John F ^a  

^a UNIVERSITY OF TORONTO   (Canada)

Author keywords

Asynchronous circuits; Digital systems; Electromagnetic interference; Failure modes; Metastability; Phase locked loop; Synchronizer; Timing design

Indexed keywords

CIRCUIT OSCILLATIONS; DATA TRANSFER; DIGITAL SIGNAL PROCESSING; ELECTRIC NETWORK PARAMETERS; ELECTROMAGNETIC WAVE INTERFERENCE; ERROR CORRECTION; PHASE LOCKED LOOPS; RELIABILITY;

ASYNCHRONOUS CIRCUITS;

DIGITAL INTEGRATED CIRCUITS;

EID: 0031078886     PISSN: 10577122     EISSN: None     Source Type: Journal    
DOI: 10.1109/81.554331     Document Type: Article

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