Estimation of average switching activity in combinational logic circuits using symbolic simulation

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 16, Issue 1, 1997, Pages 121-127

  Monteiro, José ^a   Devadas, Srinivas ^a   Ghosh, Abhijit ^a   Keutzer, Kurt ^a   White, Jacob ^a  

^a MASSACHUSETTS INSTITUTE OF TECHNOLOGY   (United States)

Author keywords

Power dissipation; Probabilistic analysis; Symbolic simulation

Indexed keywords

BOOLEAN FUNCTIONS; CMOS INTEGRATED CIRCUITS; COMPUTER SIMULATION; CORRELATION THEORY; ENERGY DISSIPATION; LOGIC CIRCUITS; LOGIC GATES; MATHEMATICAL MODELS; PROBABILITY; SWITCHING;

AVERAGE SWITCHING ACTIVITY; SYMBOLIC SIMULATION;

COMBINATORIAL CIRCUITS;

EID: 0030650441     PISSN: 02780070     EISSN: None     Source Type: Journal    
DOI: 10.1109/43.559336     Document Type: Article

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