DIAGNOSIS OF BIST FAILURES BY PPSFP SIMULATION.

Digest of Papers - International Test Conference

Volumn , Issue , 1987, Pages 480-484

  Waicukauski, John A ^a   Gupta, Ved P ^a   Patel, Sanjay T ^a  

^a IBM   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

AUTOMATIC TESTING - COMPUTER SIMULATION; FAILURE ANALYSIS; LOGIC DEVICES - GATES;

BUILT-IN SELF-TEST (BIST); LEVEL-SENSITIVE SCAN DESIGN (LSSD); OUTPUT RESPONSE COMPRESSION; PARALLEL PATTERN SINGLE FAULT PROPAGATION (PPSFP); RANDOM PATTERNS;

INTEGRATED CIRCUITS, VLSI;

EID: 0023564770     PISSN: 07431686     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (9)