Experimental chip to evaluate test techniques experiment results

IEEE International Test Conference (TC)

Volumn , Issue , 1995, Pages 663-672

  Ma, Siyad C ^a   Franco, Piero ^a   McCluskey, Edward J ^a  

^a ADVANCED MICRO DEVICES   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMBINATORIAL CIRCUITS; FAILURE ANALYSIS; LOGIC GATES; LSI CIRCUITS; MULTIPLYING CIRCUITS; SILICON WAFERS; VECTORS;

CHIP PATTERN GENERATORS; CIRCUITS UNDER TEST; CONTROL LOGIC BLOCKS; CROSS CHECK CIRCUITRY; DESIGN VERIFICATION VECTORS; OUTPUT RESPONSE ANALYZERS; TEST SUPPORT CIRCUITRY; VOLTAGE TESTS APPLICATION;

INTEGRATED CIRCUIT TESTING;

EID: 0029510949     PISSN: 10893539     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (9)