ACE: A VLSI chip for galois field GF(2m) based exponentiation

IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing

Volumn 43, Issue 4, 1996, Pages 289-297

  Ranganathan, N ^a  

^a UNIVERSITY OF ZAGREB   (Croatia)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; COMPUTER HARDWARE; CRYPTOGRAPHY; DIGITAL SIGNAL PROCESSING; ERROR CORRECTION; ITERATIVE METHODS; PARALLEL PROCESSING SYSTEMS; PIPELINE PROCESSING SYSTEMS; POLYNOMIALS; VLSI CIRCUITS;

ERROR CORRECTING CODES; FINITE FIELDS; GALOIS FIELDS;

ALGORITHMS;

EID: 0030128753     PISSN: 10577130     EISSN: None     Source Type: Journal    
DOI: 10.1109/82.488283     Document Type: Article

References (20)

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