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Volumn 41, Issue 4 B, 2002, Pages 2566-2568

A merged single-electron transistor and metal-oxide-semiconductor transistor logic for interface and multiple-valued functions

Author keywords

CMOS; Interface circuit; MOSFET; Multiple valued function; Output amplitude; SET; Voltage gain

Indexed keywords

CAPACITANCE; CMOS INTEGRATED CIRCUITS; COULOMB BLOCKADE; ELECTRIC POTENTIAL; ELECTRONS; MOSFET DEVICES; OXIDATION;

EID: 0011128089     PISSN: 00214922     EISSN: None     Source Type: Journal    
DOI: 10.1143/JJAP.41.2566     Document Type: Article
Times cited : (24)

References (12)
  • 6
    • 32444449047 scopus 로고    scopus 로고
    • Dr. Thesis, Department of Electronics and Information Systems, Osaka University, Suita
    • M. Kirihara: Dr. Thesis, Department of Electronics and Information Systems, Osaka University, Suita, 1999, p. 17.
    • (1999) , pp. 17
    • Kirihara, M.1
  • 7
    • 32444451271 scopus 로고    scopus 로고
    • note
    • To be exact, the circuits shown in Fig. 1 work as inverters only in a limited range of the input voltage where the slope of the transfer curve is negative. However, we will call them "inverters" in this paper for simplicity, considering the topological similarity to the ordinary inverters made of conventional transistors.


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.