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Volumn , Issue , 2001, Pages 112-119

Design and implementation of reconfigurable processor for problems of combinatorial computations

Author keywords

[No Author keywords available]

Indexed keywords

COMBINATORIAL OPTIMIZATION; EMBEDDED SYSTEMS; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); GENERAL PURPOSE COMPUTERS; INTEGRATED CIRCUIT DESIGN; RECONFIGURABLE ARCHITECTURES; RECONFIGURABLE HARDWARE; SYSTEMS ANALYSIS;

EID: 0009975792     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DSD.2001.952250     Document Type: Conference Paper
Times cited : (6)

References (28)
  • 1
    • 0000950606 scopus 로고    scopus 로고
    • The Roles of FPGAs in Reprogrammable Systems
    • April
    • S.Hauck, "The Roles of FPGAs in Reprogrammable Systems", Proceedings of the IEEE, vol. 86, No. 4, April 1998, pp.615-638.
    • (1998) Proceedings of the IEEE , vol.86 , Issue.4 , pp. 615-638
    • Hauck, S.1
  • 2
    • 0030104367 scopus 로고    scopus 로고
    • Programmable active memories: Reconfigurable systems come of age
    • March
    • J.Vuillemin, et al., "Programmable active memories: Reconfigurable systems come of age", IEEE transactions on VLSI Systems, vol.4, No. 1, March 1996, pp. 56-69.
    • (1996) IEEE Transactions on VLSI Systems , vol.4 , Issue.1 , pp. 56-69
    • Vuillemin, J.1
  • 4
    • 0027561268 scopus 로고
    • Processor Reconfiguration through Instruction-Set Metamorphosis
    • March
    • P.M.Athanas, H.F.Silverman, "Processor Reconfiguration through Instruction-Set Metamorphosis", Computer, vol. 26, no. 3, March 1993, pp. 11-17.
    • (1993) Computer , vol.26 , Issue.3 , pp. 11-17
    • Athanas, P.M.1    Silverman, H.F.2
  • 5
    • 84969548013 scopus 로고    scopus 로고
    • RENCO: A Reconfigurable Network Computer
    • February 22 - 25, Monterey, California
    • J.O.Haenni et al., "RENCO: A Reconfigurable Network Computer", Proc. 1998 ACM/SIGDA sixth international symposium on FPGA, February 22 - 25, 1998, Monterey, California, p.261.
    • (1998) Proc. 1998 ACM/SIGDA Sixth International Symposium on FPGA , pp. 261
    • Haenni, J.O.1
  • 10
    • 18244419281 scopus 로고    scopus 로고
    • PARNEU: General-purpose partial tree computer
    • P.Kolinummi, et al., "PARNEU: general-purpose partial tree computer", Microprocessors and Microsystems, 24, 2000, pp.23-42.
    • (2000) Microprocessors and Microsystems , vol.24 , pp. 23-42
    • Kolinummi, P.1
  • 11
    • 0034174010 scopus 로고    scopus 로고
    • Video Image Processing with the Sonic Architecture
    • April
    • S.D.Haynes, et al., "Video Image Processing with the Sonic Architecture", IEEE Computer, April 2000, pp.50-57.
    • (2000) IEEE Computer , pp. 50-57
    • Haynes, S.D.1
  • 19
    • 84969497875 scopus 로고    scopus 로고
    • Modelos matemáticos e problemas de optimização combinatória
    • January (in Portuguese)
    • I.Skliarova, A.B.Ferrari, "Modelos matemáticos e problemas de optimização combinatória", Electrónica e Telecomunicações, vol.3, No3, January 2001, pp. 202-208 (in Portuguese).
    • (2001) Electrónica e Telecomunicações , vol.3 , Issue.3 , pp. 202-208
    • Skliarova, I.1    Ferrari, A.B.2
  • 21
    • 0032686679 scopus 로고    scopus 로고
    • Static and Dynamic Configurable Systems
    • June
    • E.Sanchez, et al, "Static and Dynamic Configurable Systems", IEEE transactions on Computers, vol. 48, No. 6, June 1999, pp.556-564.
    • (1999) IEEE Transactions on Computers , vol.48 , Issue.6 , pp. 556-564
    • Sanchez, E.1
  • 25
    • 84969497912 scopus 로고    scopus 로고
    • http://www.alphadata.co.uk


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.