PARNEU: general-purpose partial tree computer

Microprocessors and Microsystems

Volumn 24, Issue 1, 2000, Pages 23-42

  Kolinummi, P ^a   Hamalainen P ^a   Hamalainen T ^a   Saarinen, J ^a  

^a TAMPERE UNIVERSITY OF TECHNOLOGY   (Finland)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; ANALOG COMPUTERS; C (PROGRAMMING LANGUAGE); COMPUTER ARCHITECTURE; COST EFFECTIVENESS; FIELD PROGRAMMABLE GATE ARRAYS; GENERAL PURPOSE COMPUTERS; MULTILAYER NEURAL NETWORKS; NETWORK PROTOCOLS; PERSONAL COMPUTERS; SELF ORGANIZING STORAGE; SOFTWARE ENGINEERING;

NEUROCOMPUTER; PARTIAL TREE SHAPE NEURAL COMPUTER; SCALABLE PARALLEL IMPLEMENTATION; SELF ORGANIZING MAP; SPARSE DISTRIBUTED MEMORY;

PARALLEL PROCESSING SYSTEMS;

EID: 18244419281     PISSN: 01419331     EISSN: None     Source Type: Journal    
DOI: 10.1016/S0141-9331(99)00075-7     Document Type: Article

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