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Volumn 8, Issue 1, 1998, Pages 67-118

The use of Petri nets for the design and verification of asynchronous circuits and systems

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EID: 0008850037     PISSN: 02181266     EISSN: None     Source Type: Journal    
DOI: 10.1142/S0218126698000055     Document Type: Article
Times cited : (8)

References (61)
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.