-
1
-
-
2442494112
-
-
PhD thesis, Stanford University
-
P. A. Beerel, CAD Tools for the Synthesis, Verification, and Testability of Robust Asynchronous Circuits, PhD thesis, Stanford University, 1994.
-
(1994)
CAD Tools for the Synthesis, Verification, and Testability of Robust Asynchronous Circuits
-
-
Beerel, P.A.1
-
2
-
-
0026913667
-
Symbolic boolean manipulation with ordered binary-decision diagrams
-
R. Bryant, "Symbolic boolean manipulation with ordered binary-decision diagrams", ACM Computing Surveys 24, 3 (1992) 293-318.
-
(1992)
ACM Computing Surveys
, vol.24
, Issue.3
, pp. 293-318
-
-
Bryant, R.1
-
5
-
-
85013470930
-
Complete state encoding based on the theory of regions
-
Aizu, Japan, Mar.
-
J. Cortadella, M. Kishinevsky, A. Kondratyev, L. Lavagno, and A. Yakovlev, "Complete state encoding based on the theory of regions", in Int. Symp. Advanced Research in Asynchronous Circuits and Systems, Aizu, Japan, Mar. 1996.
-
(1996)
Int. Symp. Advanced Research in Asynchronous Circuits and Systems
-
-
Cortadella, J.1
Kishinevsky, M.2
Kondratyev, A.3
Lavagno, L.4
Yakovlev, A.5
-
6
-
-
0029486982
-
Synthesizing Petri nets from state-based models
-
Nov.
-
J. Cortadella, M. Kishinevsky, L. Lavagno, and A. Yakovlev, "Synthesizing Petri nets from state-based models", in Proc. Int. Conf. Computer-Aided Design, Nov. 1995.
-
(1995)
Proc. Int. Conf. Computer-Aided Design
-
-
Cortadella, J.1
Kishinevsky, M.2
Lavagno, L.3
Yakovlev, A.4
-
7
-
-
0028741856
-
Designing asynchronous circuits from behavioural specifications with internal conflicts
-
Salt Lake City, Utah, Nov.
-
J. Cortadella, L. Lavagno, P. Vanbekbergen, and A. Yakovlev, "Designing asynchronous circuits from behavioural specifications with internal conflicts", in Int. Symp. Advanced Research in Asynchronous Circuits and Systems, Salt Lake City, Utah, Nov. 1994.
-
(1994)
Int. Symp. Advanced Research in Asynchronous Circuits and Systems
-
-
Cortadella, J.1
Lavagno, L.2
Vanbekbergen, P.3
Yakovlev, A.4
-
8
-
-
0002684652
-
Verification of sequential machines using boolean functional vectors
-
L. Claesen (ed.), Leuven, Belgium, Nov.
-
O. Coudert, C. Berthet, and J. C. Madre, "Verification of sequential machines using boolean functional vectors", in L. Claesen (ed.), Proc. IFIP Int. Workshop on Applied Formal Methods for Correct VLSI Design, Leuven, Belgium, Nov. 1989, pp. 111-128.
-
(1989)
Proc. IFIP Int. Workshop on Applied Formal Methods for Correct VLSI Design
, pp. 111-128
-
-
Coudert, O.1
Berthet, C.2
Madre, J.C.3
-
12
-
-
0025405313
-
Partial 2-structures; part I: Basic notions and the representation problem, and part II: State spaces of concurrent systems
-
A. Ehrenfeucht and G. Rozenberg, "Partial 2-structures; part I: Basic notions and the representation problem, and part II: State spaces of concurrent systems", Acta Informatica 27 (1990) 315-368.
-
(1990)
Acta Informatica
, vol.27
, pp. 315-368
-
-
Ehrenfeucht, A.1
Rozenberg, G.2
-
13
-
-
85029482760
-
Model checking using net unfoldings
-
M.-C. Gaudel and J.-P. Jouannaud, (eds.) Springer-Verlag
-
J. Esparza, "Model checking using net unfoldings", in M.-C. Gaudel and J.-P. Jouannaud, (eds.) TAPSOFT'93: Theory and Practice of Software Development, 4th Int. Joint Conf. CAAP/FASE, Vol. 668 of Lecture Notes in Computer Science, Springer-Verlag, 1993, pp. 613-628.
-
(1993)
TAPSOFT'93: Theory and Practice of Software Development, 4th Int. Joint Conf. CAAP/FASE, Vol. 668 of Lecture Notes in Computer Science
, pp. 613-628
-
-
Esparza, J.1
-
15
-
-
0002931233
-
Computing without clocks: Micropipelining the ARM processor
-
Graham Birtwistle and Al Davis (eds.), Workshops in Computing, Springer-Verlag
-
S. Furber, "Computing without clocks: Micropipelining the ARM processor", in Graham Birtwistle and Al Davis (eds.), Asynchronous Digital Circuit Design, Workshops in Computing, Springer-Verlag, 1995, pp. 211-262.
-
(1995)
Asynchronous Digital Circuit Design
, pp. 211-262
-
-
Furber, S.1
-
16
-
-
0001282737
-
Using partial orders to improve automatic verification methods
-
E. M. Clarke and R. P. Kurshan (eds.), DIMACS Series in Discrete Mathematica and Theoretical Computer Science
-
P. Godefroid, "Using partial orders to improve automatic verification methods", in E. M. Clarke and R. P. Kurshan (eds.), Proc. Int. Workshop on Computer Aided Verification, 1990, DIMACS Series in Discrete Mathematica and Theoretical Computer Science, 1991, pp. 321-340.
-
(1990)
Proc. Int. Workshop on Computer Aided Verification
, pp. 321-340
-
-
Godefroid, P.1
-
20
-
-
1542427122
-
An improvement of McMillan's unfolding algorithm
-
Springer-Verlag
-
S. Römer, J. Esparza, and W. Vogler, "An improvement of McMillan's unfolding algorithm", in Lecture Notes in Computer Science, Vol. 1055, Springer-Verlag, 1996.
-
(1996)
Lecture Notes in Computer Science
, vol.1055
-
-
Römer, S.1
Esparza, J.2
Vogler, W.3
-
21
-
-
0016564737
-
On interconnection of asynchronous control structures
-
J. R. Jump and P. S. Thiagarajan, "On interconnection of asynchronous control structures", J. ACM 22 4, (1975) 102-112.
-
(1975)
J. ACM
, vol.22
, Issue.4
, pp. 102-112
-
-
Jump, J.R.1
Thiagarajan, P.S.2
-
22
-
-
0003612514
-
-
John Wiley and Sons, London
-
M. Kishinevsky, A. Kondratyev, A. Taubin, and V. Varshavsky, Concurrent Hardware: The Theory and Practice of Self-Timed Design, John Wiley and Sons, London, 1993.
-
(1993)
Concurrent Hardware: The Theory and Practice of Self-Timed Design
-
-
Kishinevsky, M.1
Kondratyev, A.2
Taubin, A.3
Varshavsky, V.4
-
23
-
-
3042965635
-
On self-timed behavior verification
-
M. A. Kishinevsky, A. Y. Kondratyev, A. R. Taubin, and V. I. Varshavsky, "On self-timed behavior verification", in Proc. ACM Int. Workshop on Timing Issues in the Specification and Synthesis of Digital Systems (TAU), 1992.
-
(1992)
Proc. ACM Int. Workshop on Timing Issues in the Specification and Synthesis of Digital Systems (TAU)
-
-
Kishinevsky, M.A.1
Kondratyev, A.Y.2
Taubin, A.R.3
Varshavsky, V.I.4
-
24
-
-
77957966779
-
Checking Signal Transition Graph implementability by symbolic BDD traversal
-
Paris, France, Mar.
-
A. Kondratyev, J. Cortadella, M. Kishinevsky, E. Pastor, O. Roig, and A. Yakovlev, "Checking Signal Transition Graph implementability by symbolic BDD traversal", in Proc. of European Design and Test Conf., Paris, France, Mar. 1995, pp. 325-332.
-
(1995)
Proc. of European Design and Test Conf.
, pp. 325-332
-
-
Kondratyev, A.1
Cortadella, J.2
Kishinevsky, M.3
Pastor, E.4
Roig, O.5
Yakovlev, A.6
-
25
-
-
0030678724
-
Technology mapping for speed-independent circuits: Decomposition and resynthesis
-
Eindhoven, Apr.
-
A. Kondratyev, J. Cortadella, L. Lavagno M. Kishinevsky, and A. Yakovlev, "Technology mapping for speed-independent circuits: decomposition and resynthesis", in Int. Symp. Advanced Research in Asynchronous Circuits and Systems, Eindhoven, Apr. 1997.
-
(1997)
Int. Symp. Advanced Research in Asynchronous Circuits and Systems
-
-
Kondratyev, A.1
Cortadella, J.2
Lavagno, L.3
Kishinevsky, M.4
Yakovlev, A.5
-
26
-
-
84957620669
-
A structural approach for the analysis of Petri nets by reduced unfoldings
-
Int. Conf. Application and Theory of Petri Nets, Osaka, Japan, Jun.
-
A. Kondratyev, M. Kishinevsky, A. Taubin, and S. Ten, "A structural approach for the analysis of Petri nets by reduced unfoldings", in Int. Conf. Application and Theory of Petri Nets, Lecture Notes in Computer Sciences, Osaka, Japan, Jun. 1996.
-
(1996)
Lecture Notes in Computer Sciences
-
-
Kondratyev, A.1
Kishinevsky, M.2
Taubin, A.3
Ten, S.4
-
29
-
-
84903828974
-
Representation of switching functions by binary decision programs
-
C. Y. Lee, "Representation of switching functions by binary decision programs", Bell Syst. Tech. J. 38 (1959) 985-999.
-
(1959)
Bell Syst. Tech. J.
, vol.38
, pp. 985-999
-
-
Lee, C.Y.1
-
31
-
-
0027591119
-
Algorithms for technology mapping based on binary decision diagrams and on boolean operations
-
F. Mailhot and G. De Micheli, "Algorithms for technology mapping based on binary decision diagrams and on boolean operations", IEEE Trans. Computer-Aided Design 12, 5 (1993) 599-620.
-
(1993)
IEEE Trans. Computer-Aided Design
, vol.12
, Issue.5
, pp. 599-620
-
-
Mailhot, F.1
De Micheli, G.2
-
32
-
-
0029196816
-
A technique of state space search based on unfolding
-
K. McMillan, "A technique of state space search based on unfolding", Formal Methods in System Design 6, 1 (1995) 45-65.
-
(1995)
Formal Methods in System Design
, vol.6
, Issue.1
, pp. 45-65
-
-
McMillan, K.1
-
33
-
-
0026140274
-
Asynchronous design for programmable digital signal processors
-
Teresa H.-Y. Meng, Robert W. Brodersen, and David G. Messerschmitt, "Asynchronous design for programmable digital signal processors", IEEE Trans. Signal Processing 39, 4 (1991) 939-952.
-
(1991)
IEEE Trans. Signal Processing
, vol.39
, Issue.4
, pp. 939-952
-
-
Meng, T.H.-Y.1
Brodersen, R.W.2
Messerschmitt, D.G.3
-
34
-
-
0346111169
-
-
Chap. 10, Wiley and Sons
-
R. E. Miller, Switching Theory, Vol. 2, Chap. 10, Wiley and Sons, 1965, pp. 192-244.
-
(1965)
Switching Theory
, vol.2
, pp. 192-244
-
-
Miller, R.E.1
-
35
-
-
0022219486
-
Synthesis of delay-insensitive modules
-
C. E. Molnar, T.-P. Fang, and F. U. Rosenberger, "Synthesis of delay-insensitive modules", in Chapel Hill Conference on VLSI, 1985, pp. 67-86.
-
(1985)
Chapel Hill Conference on VLSI
, pp. 67-86
-
-
Molnar, C.E.1
Fang, T.-P.2
Rosenberger, F.U.3
-
37
-
-
0024645936
-
Petri Nets: Properties, analysis and applications
-
T. Murata, "Petri Nets: Properties, analysis and applications", Proc. IEEE (1989) 541-580.
-
(1989)
Proc. IEEE
, pp. 541-580
-
-
Murata, T.1
-
39
-
-
49149133619
-
Events structures and domains
-
M. Nielsen, G. Plotkin, and G. Winskel, "Events structures and domains", Theoretical Comput. Sci. 13, 1 (1980) 85-108.
-
(1980)
Theoretical Comput. Sci.
, vol.13
, Issue.1
, pp. 85-108
-
-
Nielsen, M.1
Plotkin, G.2
Winskel, G.3
-
41
-
-
0027831840
-
Polynomial algorithms for the synthesis of hazard-free circuits from signal transition graphs
-
Nov.
-
E. Pastor and J. Cortadella, "Polynomial algorithms for the synthesis of hazard-free circuits from signal transition graphs", in Proc. Int. Conf. Camputer-Aided Design, Nov. 1993.
-
(1993)
Proc. Int. Conf. Camputer-Aided Design
-
-
Pastor, E.1
Cortadella, J.2
-
42
-
-
0000897859
-
Petri net analysis using boolean manipulation
-
Zaragoza, Spain, June
-
E. Pastor, O. Roig, J. Cortadella, and R. Badia, "Petri net analysis using boolean manipulation", in 15th Int. Conf. Application and Theory of Petri Nets, Zaragoza, Spain, June 1994.
-
(1994)
15th Int. Conf. Application and Theory of Petri Nets
-
-
Pastor, E.1
Roig, O.2
Cortadella, J.3
Badia, R.4
-
43
-
-
0029735447
-
Structural methods for the synthesis of speed-independent circuits
-
Paris, France, Mar.
-
E. Pastor, J. Cortadella, A. Kondratyev, and O. Roig, "Structural methods for the synthesis of speed-independent circuits", in Proc. of European Design and Test Conference, Paris, France, Mar. 1996, pp. 340-347.
-
(1996)
Proc. of European Design and Test Conference
, pp. 340-347
-
-
Pastor, E.1
Cortadella, J.2
Kondratyev, A.3
Roig, O.4
-
44
-
-
2342622666
-
The description and realization of digital systems
-
S. S. Patil and J. B. Dennis, "The description and realization of digital systems", in Proc. IEEE COMPCON, 1972, pp. 223-226.
-
(1972)
Proc. IEEE COMPCON
, pp. 223-226
-
-
Patil, S.S.1
Dennis, J.B.2
-
45
-
-
0017538857
-
-
ACM Computing Surveys, Sept.
-
J. L. Peterson, Petri Nets, Vol. 9, ACM Computing Surveys, No. 3, Sept. 1977.
-
(1977)
Petri Nets
, vol.9
, Issue.3
-
-
Peterson, J.L.1
-
46
-
-
0004068620
-
-
PhD thesis, Bonn, Institut für Instrumentelle Mathematik, (Technical report Schriften des IIM Nr. 3)
-
C. A. Petri, Kommunikation mit Automaten, PhD thesis, Bonn, Institut für Instrumentelle Mathematik, 1962 (Technical report Schriften des IIM Nr. 3).
-
(1962)
Kommunikation Mit Automaten
-
-
Petri, C.A.1
-
48
-
-
0004006996
-
-
EATCS Monographs on Theoretical Computer Science, Springer-Verlag, Berlin
-
W. Reisig, Petri Nets: an Introduction, EATCS Monographs on Theoretical Computer Science, Springer-Verlag, Berlin, 1985.
-
(1985)
Petri Nets: An Introduction
-
-
Reisig, W.1
-
49
-
-
0029213602
-
Hierarchical gate-level verification of speed-independent circuits
-
O. Roig, J. Cortadella, and E. Pastor, "Hierarchical gate-level verification of speed-independent circuits", in Asynchronous Design Methodologies, 1995, pp. 129-137.
-
(1995)
Asynchronous Design Methodologies
, pp. 129-137
-
-
Roig, O.1
Cortadella, J.2
Pastor, E.3
-
50
-
-
85034470981
-
The signal graph language for the modeling of exchange protocols and aperiodic circuits
-
Sverdlovsk, USSR, Feb. (in Russian)
-
L. Rosenblum, "The signal graph language for the modeling of exchange protocols and aperiodic circuits", in Proc. Conf. Simulation of Digital Control and Computer Systems, Sverdlovsk, USSR, Feb. 1981 (in Russian).
-
(1981)
Proc. Conf. Simulation of Digital Control and Computer Systems
-
-
Rosenblum, L.1
-
51
-
-
0028710942
-
Decomposition methods for library binding of speed-independent asynchronous designs
-
Nov.
-
P. Siegel and G. De Micheli, "Decomposition methods for library binding of speed-independent asynchronous designs", in Proc. Int. Conf. Computer-Aided Design, Nov. 1994, pp. 558-565.
-
(1994)
Proc. Int. Conf. Computer-Aided Design
, pp. 558-565
-
-
Siegel, P.1
De Micheli, G.2
-
53
-
-
0022920182
-
A formal model for defining and classifying delay-insensitive circuits and systems
-
J. T. Udding, "A formal model for defining and classifying delay-insensitive circuits and systems", Distributed Computing 1 (1986) 197-204.
-
(1986)
Distributed Computing
, vol.1
, pp. 197-204
-
-
Udding, J.T.1
-
54
-
-
0011590722
-
State of the art report: Stubborn sets
-
A. Valmari, "State of the art report: Stubborn sets", Petri Nets Newsletter 46 (1994) 6-14.
-
(1994)
Petri Nets Newsletter
, vol.46
, pp. 6-14
-
-
Valmari, A.1
-
55
-
-
3042999557
-
Optimized synthesis of asynchronous control circuits from graph-theoretic specifications
-
Jan.
-
P. Vanbekbergen, F. Catthoor, G. Goossens, and H. De Man, "Optimized synthesis of asynchronous control circuits from graph-theoretic specifications", IEEE Trans. Computer-Aided Design, Jan. 1993.
-
(1993)
IEEE Trans. Computer-Aided Design
-
-
Vanbekbergen, P.1
Catthoor, F.2
Goossens, G.3
De Man, H.4
-
56
-
-
0028370073
-
A generalized state assignment theory for transformations on signal transition graphs
-
P. Vanbekbergen, B. Lin, G. Goossens, and H. de Man, "A generalized state assignment theory for transformations on signal transition graphs", J. VLSI Signal Processing 7, 1/2 (1994) 101-115.
-
(1994)
J. VLSI Signal Processing
, vol.7
, Issue.1-2
, pp. 101-115
-
-
Vanbekbergen, P.1
Lin, B.2
Goossens, G.3
De Man, H.4
-
57
-
-
84957659359
-
Asynchronous control device design by net model behaviour simulation
-
Int. Conf. Application and Theory of Petri Nets, Osaka, Japan, June
-
V. Varshavsky and V. Marakhovsky, "Asynchronous control device design by net model behaviour simulation", in Int. Conf. Application and Theory of Petri Nets, Lecture Notes in Computer Sciences, Osaka, Japan, June 1996.
-
(1996)
Lecture Notes in Computer Sciences
-
-
Varshavsky, V.1
Marakhovsky, V.2
-
58
-
-
0004077665
-
-
Kluwer Academic Publisher, Russian edition
-
V. I. Varshavsky, M. A. Kishinevsky, V. B. Marakhovsky, V. A. Peschansky, L. Y. Rosenblum, A. R. Taubin, and B. S. Tzirlin, Self-timed Control of Concurrent Processes, Kluwer Academic Publisher, 1990 (Russian edition: 1986).
-
(1986)
Self-timed Control of Concurrent Processes
-
-
Varshavsky, V.I.1
Kishinevsky, M.A.2
Marakhovsky, V.B.3
Peschansky, V.A.4
Rosenblum, L.Y.5
Taubin, A.R.6
Tzirlin, B.S.7
-
59
-
-
3042968700
-
On limitations and extensions of STG model for designing asynchronous control circuits
-
Oct.
-
A. V. Yakovlev, "On limitations and extensions of STG model for designing asynchronous control circuits", in Proc. Int. Conf. Computer Design, Oct. 1992, pp. 396-400.
-
(1992)
Proc. Int. Conf. Computer Design
, pp. 396-400
-
-
Yakovlev, A.V.1
-
60
-
-
0030412962
-
Modeling, analysis and synthesis of asynchronous control circuits using Petri nets
-
A. V. Yakovlev, A. M. Koelmans, A. Semenov, and D. J. Kinnement, "Modeling, analysis and synthesis of asynchronous control circuits using Petri nets", Integration, the VLSI Journal 21, 3 (1996) 143-170.
-
(1996)
Integration, the VLSI Journal
, vol.21
, Issue.3
, pp. 143-170
-
-
Yakovlev, A.V.1
Koelmans, A.M.2
Semenov, A.3
Kinnement, D.J.4
-
61
-
-
3042965634
-
Specification and verification of asynchronous circuits using marked graphs
-
K. Voss, H. J. Genrich, and G. Rozenberg (eds.)
-
M. Yoeli, "Specification and verification of asynchronous circuits using marked graphs", in K. Voss, H. J. Genrich, and G. Rozenberg (eds.), Concurrency and Nets, Advances in Petri Nets, 1987, pp. 605-622.
-
(1987)
Concurrency and Nets, Advances in Petri Nets
, pp. 605-622
-
-
Yoeli, M.1
|