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Volumn 1, Issue , 1999, Pages 14-21

Exploiting data transfer locality in memory mapping

Author keywords

[No Author keywords available]

Indexed keywords

DISTRIBUTED MEMORY ORGANIZATIONS; KEY ISSUES; MEMORY ACCESS; MEMORY BANDWIDTHS; MEMORY MAPPING; STORAGE SPACES; SYSTEM-LEVEL EXPLORATION;

EID: 0007700504     PISSN: 10896503     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/EURMIC.1999.793132     Document Type: Conference Paper
Times cited : (5)

References (19)
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    • (1994) Proc. Intnl. Conf. on Applic.-Spec. Array Processors , pp. 427-438
    • Catthoor, F.1    Geurts, W.2    De Man, H.3
  • 5
    • 0030173561 scopus 로고    scopus 로고
    • Lower bounds on memory requirements for statically scheduled DSP programs
    • T. Denk, K. Parhi, "Lower bounds on memory requirements for statically scheduled DSP programs", Journal of VLSI Signal Processing, No.12, pp.247-263, 1996.
    • (1996) Journal of VLSI Signal Processing, No. 12 , pp. 247-263
    • Denk, T.1    Parhi, K.2
  • 7
    • 0025489299 scopus 로고
    • An efficient microcode compiler for application-specific DSP processors
    • Sep
    • G. Goossens, J. Rabaey, J. Vandewalle, H. De Man, "An efficient microcode compiler for application-specific DSP processors", IEEE Trans. on Comp.-aided Design, Vol.9, No.9, pp.925-937, Sep. 1990.
    • (1990) IEEE Trans. on Comp.-aided Design , vol.9 , Issue.9 , pp. 925-937
    • Goossens, G.1    Rabaey, J.2    Vandewalle, J.3    De Man, H.4
  • 9
    • 0032295394 scopus 로고    scopus 로고
    • High-level address optimization and synthesis techniques for data-transfer intensive applications
    • Dec
    • M. Miranda, F. Catthoor, M. Janssen, H. De Man, "High-Level Address Optimization and Synthesis Techniques for Data-Transfer Intensive Applications", IEEE Trans. on VLSI Systems, no.4, vol.6, pp.677-686., Dec. 1998.
    • (1998) IEEE Trans. on VLSI Systems , vol.6 , Issue.4 , pp. 677-677
    • Miranda, M.1    Catthoor, F.2    Janssen, M.3    De Man, H.4
  • 11
    • 0031099182 scopus 로고    scopus 로고
    • Synthesis of application-specific memory designs
    • Mar
    • H. Schmit, D. Thomas, "Synthesis of Application-Specific Memory Designs", IEEE Trans. on VLSI Systems, Vol.5, No.1, pp.101-111, Mar. 1997.
    • (1997) IEEE Trans. on VLSI Systems , vol.5 , Issue.1 , pp. 101-111
    • Schmit, H.1    Thomas, D.2
  • 12
    • 84886513044 scopus 로고
    • Synthesis of intermediate memories for the data supply to processor arrays
    • P. Quinton, Y. Robert (eds. ), Elsevier
    • M. Schonfeld, M. Schwiegershausen, P. Pirsch, "Synthesis of intermediate memories for the data supply to processor arrays," in Algorithms and Parallel Architectures II, P. Quinton, Y. Robert (eds.), Elsevier, 1992, pp.365-370.
    • (1992) Algorithms and Parallel Architectures II , pp. 365-370
    • Schonfeld, M.1    Schwiegershausen, M.2    Pirsch, P.3
  • 18


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.