Lower bounds on memory requirements for statically scheduled DSP programs

Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology

Volumn 12, Issue 3, 1996, Pages 247-264

  Denk, Tracy C ^a   Parhi, Keshab K ^a  

^a UNIVERSITY OF MINNESOTA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; CIRCUIT THEORY; COMPUTER HARDWARE; GRAPH THEORY; INTEGER PROGRAMMING; ITERATIVE METHODS; LINEAR PROGRAMMING; MATHEMATICAL MODELS; OPTIMIZATION; STORAGE ALLOCATION (COMPUTER);

DATA FLOW GRAPH REPRESENTATION; INTEGER LINEAR PROGRAMMING; ONE STAGE PIPELINED HARDWARE MODULE; SYSTEMATIC FOLDING TECHNIQUES;

DIGITAL SIGNAL PROCESSING;

EID: 0030173561     PISSN: 09225773     EISSN: None     Source Type: Journal    
DOI: 10.1007/BF00924988     Document Type: Article

References (35)