Cost and benefit models for logic and memory BIST

Proceedings -Design, Automation and Test in Europe, DATE

Volumn , Issue , 2000, Pages 710-714

  Lu, Juin Ming ^a   Wu, Cheng Wen ^a  

^a NATIONAL TSING HUA UNIVERSITY   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

BUILTIN SELF-TEST (BIST); COST AND BENEFITS; DESIGN VERIFICATION; MEMORY BIST; MEMORY CORE; TEST DEVELOPMENT; TESTABILITY; THRESHOLD VOLUME;

BUILT-IN SELF TEST; DESIGN; EXHIBITIONS;

COSTS;

EID: 0002575268     PISSN: 15301591     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DATE.2000.840865     Document Type: Conference Paper

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