Air gaps lower k of interconnect dielectrics

Solid State Technology

Volumn 42, Issue 2, 1999, Pages 51-58

  Shieh, Benjamin ^a,b   Saraswat, Krishna C ^a   Deal, Michael D ^a   McVittie, Jim ^a  

^a STANFORD UNIVERSITY   (United States)

^b UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

EID: 0001842957     PISSN: 0038111X     EISSN: None     Source Type: Trade Journal    
DOI: None     Document Type: Article

References (9)

1. M. Bohr, "Interconnect Scaling - The Real Limiter to High Performance ULSI," IEEE IEDM Tech. Dig., pp. 241-244, 1995.
2. M.B. Anand, M. Yamada, H. Shibata, "NURA: A Feasible, Gas Dielectric Interconnect Process," Symp. on VLSI Technology, pp. 82, 83, June 1996.
3. S.P. Jeng, R.H. Havemann, M. Chang, "Process Integration and Manufacturability Issues for High Performance Multilevel Interconnect," Proc. Mater. Res. Soc. Symp., pp. 25-31, 1994.
4. B. Shieh, et al., "Air-Gap Formation During IMD Deposition to Lower Interconnect Capacitance," IEEE Electron Device Letters, Vol. 19, No. 1, pp. 16-18, Jan. 1998.
5. T. Ueda, et al., "A Novel Air Gap Integration Scheme for Multi-level Interconnects using Self Aligned Via Plugs," Symp. on VLSI Technology, pp. 46, 47, June 1998.
6. J.G. Fleming, E. Roherty-Osmum, "Use of Air-Gap Structures to Lower Intralevel Capacitance," Proc. DUMIC, pp. 139-145, 1997.
7. B.P. Shieh, et al., "Integration and Reliability Issues for Low Capacitance Air-Gap Interconnect Structures, "Proc. IEEE IITC, pp. 125, 126, 1998.
8. Conversation with Per Sverdrup, Dept. of Mechanical Engineering, Stanford University.
9. L.C. Bassman, et al., "Simulation of the Effect of Dielectric Air Gaps on Interconnect Reliability," Proc. Mater. Res. Soc. Symp., San Francisco, pp. 323-328, 1997.