NURA: a feasible, gas-dielectric interconnect process

Digest of Technical Papers - Symposium on VLSI Technology

Volumn , Issue , 1996, Pages 82-83

  Anand, M B ^a   Yamada, M ^a   Shibata, H ^a  

^a TOSHIBA CORPORATION   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

CARBON DIOXIDE; COMPUTER SIMULATION; DIELECTRIC MATERIALS; FURNACES; LSI CIRCUITS; PERMITTIVITY; SCANNING ELECTRON MICROSCOPY; SILICA; THIN FILMS;

DELAY TIME; DUAL DAMASCENE PROCESS; FIELD SOLVER SIMULATION; FURNACE ASHING; GAS DIELECTRIC INTERCONNECT PROCESS; WIRE TO WIRE ISOLATION CHARACTERISTICS;

INTEGRATED CIRCUIT MANUFACTURE;

EID: 0029713416     PISSN: 07431562     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (4)