Effects of wafer thinning condition on the roughness, morphology and fracture strength of silicon die

Journal of Electronic Packaging

Volumn 126, Issue 1, 2004, Pages 110-114

  McLellan, Neil ^a   Fan, Nelson ^a   Liu, Shilai ^a   Lau, Kim ^a   Wu, Jingshen ^a  

^a NONE

Author keywords

[No Author keywords available]

Indexed keywords

BENDING STRENGTH; FRACTURE TOUGHNESS; GEOMETRY; MORPHOLOGY; PLASMA ETCHING; SILICON WAFERS; STRESS CONCENTRATION; SURFACE ROUGHNESS;

BENDING TESTS; SPECIMENS; SURFACE POLISHING; WAFER THINNING;

DIES;

EID: 8744275212     PISSN: 10437398     EISSN: None     Source Type: Journal    
DOI: 10.1115/1.1647123     Document Type: Article

References (7)

1. Lim, T. B., 1989, "The Impact of Wafer Back Surface Finish on Chip Strength," IEEE/IRPS.
2. Landesberger, C., Klink, G., Schwinn, G., and Aschenbrenner, R., 2001, "New Dicing and Thinning Concept Improves Mechanical Reliability of Ultra Thin Silicon," 2001 Int'l Symposium on Advanced Packaging Materials.
3. Savastiouk, S., Siniaguine, O., Reche, J., and Korczynski, E., 2000, "Thru-Silicon Interconnect Technology," 2000 IEEE/CPMT Int'l Electronics Manufacturing Technology Symposium.
4. Siniaguine, O., 1998, "Atmospheric Downstream Plasma Etching of Si Wafers," 7998 IEEE/CPMT Int'l Electronics Manufacturing Technology Symposium.
5. Veeco Metrology Group, 1999, "WYKO Surface Profilers Technical Reference Manual," Version 2.2.1.
6. Lewis, S., 1992, "Backgrinding Wafers for Maximum Die Strength," Semicond. Int., pp. 86-89.
7. Lee, S. M., Sim, S. M., Chung, Y. W., Jang, Y K., and Cho, H. K., 1997, "Fracture Strength Measurement of Silicon Chips," Jpn. J. Appl. Phys., 36(16A), pp. 3374-3380.