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Volumn , Issue , 2007, Pages 291-306

Active hardware metering for intellectual property protection and security

Author keywords

[No Author keywords available]

Indexed keywords

INTEGRATED CIRCUITS; INTELLECTUAL PROPERTY;

EID: 85077688405     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (339)

References (32)
  • 13
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    • Local watermarks: Methodology and application to behavioral synthesis
    • D. Kirovski and M. Potkonjak. Local watermarks: methodology and application to behavioral synthesis. IEEE Trans. CAD, 22(9):1277–1283, 2003.
    • (2003) IEEE Trans. CAD , vol.22 , Issue.9 , pp. 1277-1283
    • Kirovski, D.1    Potkonjak, M.2
  • 19
    • 4544381402 scopus 로고    scopus 로고
    • A technique to build a secret key in integrated circuits for identification and authentication applications
    • J.W. Lee, L. Daihyun, B. Gassend, G.E. Suh, M. van Dijk, and S. Devadas. A technique to build a secret key in integrated circuits for identification and authentication applications. In Symposium of VLSI Circuits, pages 176–179, 2004.
    • (2004) Symposium of VLSI Circuits , pp. 176-179
    • Lee, J.W.1    Daihyun, L.2    Gassend, B.3    Suh, G.E.4    van Dijk, M.5    Devadas, S.6
  • 21
    • 0041663673 scopus 로고    scopus 로고
    • An artificial fingerprint device (AFD): A study of identification number applications utilizing characteristics variation of polycrystalline silicon TFTs
    • S. Maeda, H. Kuriyama, T. Ipposhi, S. Maegawa, Y. Inoue, M. Inuishi, N. Kotani, and T. Nishimura. An artificial fingerprint device (AFD): a study of identification number applications utilizing characteristics variation of polycrystalline silicon TFTs. IEEE Trans. Electron Devices, 50(6):1451–1458, 2003.
    • (2003) IEEE Trans. Electron Devices , vol.50 , Issue.6 , pp. 1451-1458
    • Maeda, S.1    Kuriyama, H.2    Ipposhi, T.3    Maegawa, S.4    Inoue, Y.5    Inuishi, M.6    Kotani, N.7    Nishimura, T.8
  • 22
    • 0035440030 scopus 로고    scopus 로고
    • Techniques for the creation of digital watermarks in sequential circuit designs
    • A. Oliveira. Techniques for the creation of digital watermarks in sequential circuit designs. IEEE Trans. CAD of Integrated Circuits and Systems, 20(9):1101–1117, 2001.
    • (2001) IEEE Trans. CAD of Integrated Circuits and Systems , vol.20 , Issue.9 , pp. 1101-1117
    • Oliveira, A.1
  • 24
    • 22244484728 scopus 로고    scopus 로고
    • Where do the dopants go?
    • S. Roy and A. Asenov. Where do the dopants go? Science, 309(5733):388–390, 2005.
    • (2005) Science , vol.309 , Issue.5733 , pp. 388-390
    • Roy, S.1    Asenov, A.2
  • 25
    • 0025561399 scopus 로고
    • On the optimization power of retiming and resynthesis transformations
    • H. Savoj and R.K. Brayton. On the optimization power of retiming and resynthesis transformations. In Design Automation Conference (DAC), pages 297–301, 1990.
    • (1990) Design Automation Conference (DAC) , pp. 297-301
    • Savoj, H.1    Brayton, R.K.2
  • 30
    • 0033879740 scopus 로고    scopus 로고
    • Watermarking-based copyright protection of sequential functions
    • I. Torunoglu and E. Charbon. Watermarking-based copyright protection of sequential functions. IEEE Journal of Solid-State Circuits (JSSC), 35(3):434–440, 2000.
    • (2000) IEEE Journal of Solid-State Circuits (JSSC) , vol.35 , Issue.3 , pp. 434-440
    • Torunoglu, I.1    Charbon, E.2
  • 32
    • 8344275946 scopus 로고    scopus 로고
    • Fair watermarking using combinatorial isolation lemmas
    • J.L. Wong, R. Majumdar, and M. Potkonjak. Fair watermarking using combinatorial isolation lemmas. IEEE Trans. CAD, 23(11):1566–1574, 2004.
    • (2004) IEEE Trans. CAD , vol.23 , Issue.11 , pp. 1566-1574
    • Wong, J.L.1    Majumdar, R.2    Potkonjak, M.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.