-
1
-
-
0034828184
-
Hybrid global/local search strategies for dynamic voltage scaling in embedded multiprocessors
-
Bambha, N., Bhattacharyya, S., Teich, J., Zitzler, E., 2001. Hybrid global/local search strategies for dynamic voltage scaling in embedded multiprocessors. In Proceedings of the 1st International Symposium on Hardware/Software Co-Design (CODES'01), 243-248.
-
(2001)
Proceedings of the 1st International Symposium on Hardware/Software Co-Design (CODES'01)
, pp. 243-248
-
-
Bambha, N.1
Bhattacharyya, S.2
Teich, J.3
Zitzler, E.4
-
2
-
-
0033732069
-
Energy estimation for 32 bit microprocessors
-
Brandolese, C., Fornaciari, W., Salice, F., Sciuto, D., 2000. Energy estimation for 32 bit microprocessors. In Proceedings of the 8th International Workshop Hardware/Software Co-Design (CODES'00), 24-28.
-
(2000)
Proceedings of the 8th International Workshop Hardware/Software Co-Design (CODES'00)
, pp. 24-28
-
-
Brandolese, C.1
Fornaciari, W.2
Salice, F.3
Sciuto, D.4
-
3
-
-
0003882780
-
Energy-efficient processor system design
-
Ph.D. thesis, University of California at Berkeley
-
Burd, T. D., 2001. Energy-efficient processor system design. Ph.D. thesis, University of California at Berkeley.
-
(2001)
-
-
Burd, T.D.1
-
4
-
-
0030205558
-
Processor design for portable systems
-
Aug
-
Burd, T. D., Brodersen, R. W., 1996. Processor design for portable systems. J. VLSI Signal Processing 13, 2 (Aug.), 203-222.
-
(1996)
J. VLSI Signal Processing
, vol.13
, Issue.2
, pp. 203-222
-
-
Burd, T.D.1
Brodersen, R.W.2
-
5
-
-
0034315851
-
A dynamic voltage scaled microprocessor system
-
Nov
-
Burd, T. D., Pering, T. A., Stratakos, A. J., Brodersen, R. W., 2000. A dynamic voltage scaled microprocessor system.EEE J. Solid-State Circuits 35, 11 (Nov.), 1571-1580.
-
(2000)
EEE J. Solid-State Circuits
, vol.35
, Issue.11
, pp. 1571-1580
-
-
Burd, T.D.1
Pering, T.A.2
Stratakos, A.J.3
Brodersen, R.W.4
-
6
-
-
0003987718
-
-
Wiley, New York
-
Chretienne, P., Coffman, E. G., Lenstra, J. K., Liu, Z., 1995. Scheduling Theory and its Applications. Wiley, New York.
-
(1995)
Scheduling Theory and its Applications.
-
-
Chretienne, P.1
Coffman, E.G.2
Lenstra, J.K.3
Liu, Z.4
-
8
-
-
0029191132
-
SHEMUS: Synthesis of heterogeneous multiprocessor systems
-
(Aug.)
-
Dhodhi, M. K., Ahmad, I., Storer, R., 1995. SHEMUS: Synthesis of heterogeneous multiprocessor systems. J. Microprocessors and Microsystems 19, 6 (Aug.), 311-319.
-
(1995)
J. Microprocessors and Microsystems
, vol.19
, Issue.6
, pp. 311-319
-
-
Dhodhi, M.K.1
Ahmad, I.2
Storer, R.3
-
9
-
-
0031681657
-
TGFF: Task graphs for free
-
Dick, R., Rhodes, D., Wolf, W., 1998. TGFF: Task graphs for free. In Proceedings of the 5th International Workshop on Hardware/Software Co-Design (Codes/CASHE97), 97-101.
-
(1998)
Proceedings of the 5th International Workshop on Hardware/Software Co-Design (Codes/CASHE97)
, pp. 97-101
-
-
Dick, R.1
Rhodes, D.2
Wolf, W.3
-
10
-
-
0032184116
-
MOGAC: A multiobjective genetic algorithm for hardwaresoftware co-synthesis of distributed embedded systems
-
Oct
-
Dick, R. P., Jha, N. K., 1998. MOGAC: A multiobjective genetic algorithm for hardwaresoftware co-synthesis of distributed embedded systems. IEEE Trans. Computer-Aided Design 17, 10 (Oct.), 920-935.
-
(1998)
IEEE Trans. Computer-Aided Design
, vol.17
, Issue.10
, pp. 920-935
-
-
Dick, R.P.1
Jha, N.K.2
-
11
-
-
0030784055
-
System level hardware/software partitioning based on simulated annealing and tabu search
-
Eles, P., Peng, Z., Kuchcinski, K., Doboli, A., 1997. System level hardware/software partitioning based on simulated annealing and tabu search. J. Design Automation Embedded Systems 2, 5-32.
-
(1997)
J. Design Automation Embedded Systems
, vol.2
, pp. 5-32
-
-
Eles, P.1
Peng, Z.2
Kuchcinski, K.3
Doboli, A.4
-
12
-
-
84943730764
-
Hardware-software co-synthesis for mirco-controllers
-
Dec
-
Ernst, R., Henkel, J., Brenner, T., 1993. Hardware-software co-synthesis for mirco-controllers. IEEE Design & Test of Comp. 10, 4 (Dec.), 64-75.
-
(1993)
IEEE Design & Test of Comp.
, vol.10
, Issue.4
, pp. 64-75
-
-
Ernst, R.1
Henkel, J.2
Brenner, T.3
-
14
-
-
0032683154
-
Power estimation for architectural exploration of HW/SW communication on system-level buses
-
Fornaciari, W., Sciuto, D., AND Silvano, C., 1999. Power estimation for architectural exploration of HW/SW communication on system-level buses. In Proceedings of the 7th International Workshop on Hardware/Software Cc- Design (CODES'99), 152-156.
-
(1999)
Proceedings of the 7th International Workshop on Hardware/Software Cc- Design (CODES'99)
, pp. 152-156
-
-
Fornaciari, W.1
Sciuto, D.2
Silvano, C.3
-
15
-
-
0003603813
-
-
W.H. Freeman and Company, San Francisco, CA
-
Garey, M. R., Johnson, D. S., 1979. Computers and Intractability: A Guide to the theory of NP-Completeness. W.H. Freeman and Company, San Francisco, CA.
-
(1979)
Computers and Intractability: A Guide to the theory of NP-Completeness.
-
-
Garey, M.R.1
Johnson, D.S.2
-
17
-
-
0032642349
-
Genetic list scheduling algorithm for scheduling and allocation on a loosely coupled heterogeneous multiprocessor system
-
Grajcar, M., 1999. Genetic list scheduling algorithm for scheduling and allocation on a loosely coupled heterogeneous multiprocessor system. In Proceedings of the IEEE 36th Design Automation Confeerence (DAC99), 280-285.
-
(1999)
Proceedings of the IEEE 36th Design Automation Confeerence (DAC99)
, pp. 280-285
-
-
Grajcar, M.1
-
18
-
-
4544327551
-
System-level design methods for low-energy architectures containing variable voltage processors
-
Gruian, F., 2000. System-level design methods for low-energy architectures containing variable voltage processors. In Workshop on Power-Aware Computing Systems.
-
(2000)
Workshop on Power-Aware Computing Systems.
-
-
Gruian, F.1
-
20
-
-
0031375030
-
Embedded power supply for low-power DSP
-
Gutnik, V., Chandrakasan, A., 1997. Embedded power supply for low-power DSP. IEEE Trans. VLSISysstems 5, 4, 425-435.
-
(1997)
IEEE Trans. VLSISysstems
, vol.5
, Issue.4
, pp. 425-435
-
-
Gutnik, V.1
Chandrakasan, A.2
-
22
-
-
0035300993
-
An approach to automated hardware/software partitioning using a flexible granularity that is driven by high-level estimation techniques
-
Henkel, J., Ernst, R., 2001. An approach to automated hardware/software partitioning using a flexible granularity that is driven by high-level estimation techniques. IEEE Trans. VLSI Systems 9, 2, 273-289.
-
(2001)
IEEE Trans. VLSI Systems
, vol.9
, Issue.2
, pp. 273-289
-
-
Henkel, J.1
Ernst, R.2
-
23
-
-
0033319645
-
Power optimization of variable-voltage core-based systems
-
Dec
-
Hong, I., Kirovski, D., Qu, G., Potkonjak, M., Srivastava, M. B., 1999. Power optimization of variable-voltage core-based systems. IEEE Trans. Computer-Aided Design 18, 12 (Dec.), 1702-1714.
-
(1999)
IEEE Trans. Computer-Aided Design
, vol.18
, Issue.12
, pp. 1702-1714
-
-
Hong, I.1
Kirovski, D.2
Qu, G.3
Potkonjak, M.4
Srivastava, M.B.5
-
24
-
-
0029700287
-
Process partitioning for distributed embedded systems
-
Hou, J., Wolf, W., 1996. Process partitioning for distributed embedded systems. In Proceedings of the CODES, 70-76.
-
(1996)
Proceedings of the CODES
, pp. 70-76
-
-
Hou, J.1
Wolf, W.2
-
28
-
-
0029547603
-
Performance estimation of embedded software with instruction cache modeling
-
Li, Y.-T.S., Malik, S., Wolfe, A., 1995. Performance estimation of embedded software with instruction cache modeling. In Proceedings of the IEEE/ACM International Conference on Computer-AidedDesign (ICCAD-95), 380-387.
-
(1995)
Proceedings of the IEEE/ACM International Conference on Computer-AidedDesign (ICCAD-95)
, pp. 380-387
-
-
Li, Y.-T.S.1
Malik, S.2
Wolfe, A.3
-
29
-
-
0034854193
-
Power-aware scheduling under timing constraints for mission-critical embedded systems
-
Liu, J., Chou, P. H., Bagherzadeh, N., Kurdahi, F., 2001. Power-aware scheduling under timing constraints for mission-critical embedded systems. In Proceedings of the IEEE 38th Design Automation Conference (DAC01), 840-845.
-
(2001)
Proceedings of the IEEE 38th Design Automation Conference (DAC01)
, pp. 840-845
-
-
Liu, J.1
Chou, P.H.2
Bagherzadeh, N.3
Kurdahi, F.4
-
32
-
-
0033709471
-
Variable voltage task scheduling for minimizing energy or minimizing power
-
Manzak, A., Chakrabarti, C., 2000. Variable voltage task scheduling for minimizing energy or minimizing power. In Proceedings of the International Conference on Acoustics, Speech, and SignalProceesing (ICASSFO), 3239-3242.
-
(2000)
Proceedings of the International Conference on Acoustics, Speech, and SignalProceesing (ICASSFO)
, pp. 3239-3242
-
-
Manzak, A.1
Chakrabarti, C.2
-
35
-
-
84978423018
-
Real-time task scheduling for a variable voltage processor
-
Okuma, T., Ishihara, T., Yasuura, H., 1999. Real-time task scheduling for a variable voltage processor. In Proceedings of the International Symposium on System Synthesis (ISSS'99), 24-29.
-
(1999)
Proceedings of the International Symposium on System Synthesis (ISSS'99)
, pp. 24-29
-
-
Okuma, T.1
Ishihara, T.2
Yasuura, H.3
-
36
-
-
0035280198
-
Software energy reduction techniques for variablevoltage processors
-
(Mar.-Apr.)
-
Okuma, T., Ishihara, T., Yasuura, H., 2001. Software energy reduction techniques for variablevoltage processors. IEEE Design & Test of Comp. 18, 2 (Mar.-Apr.), 31-41.
-
(2001)
IEEE Design & Test of Comp.
, vol.18
, Issue.2
, pp. 31-41
-
-
Okuma, T.1
Ishihara, T.2
Yasuura, H.3
-
37
-
-
5544256331
-
Power minimization in IC design: principles and applications
-
Jan
-
Pedram, M., 1996. Power minimization in IC design: principles and applications. ACM Trans. Design Automation of Electronic Systems 1, 1 (Jan.), 3-56.
-
(1996)
ACM Trans. Design Automation of Electronic Systems
, vol.1
, Issue.1
, pp. 3-56
-
-
Pedram, M.1
-
38
-
-
0031639466
-
The simulation and evaluation for dynamic voltage scaling algorithms
-
Pering, T., Burd, T. D., Brodersen, R. B., 1998. The simulation and evaluation for dynamic voltage scaling algorithms. In Proceedings of the International Symposium on Low Power Elec-ti-onics and Design (ISLPED'98), 76-81.
-
(1998)
Proceedings of the International Symposium on Low Power Elec-ti-onics and Design (ISLPED'98)
, pp. 76-81
-
-
Pering, T.1
Burd, T.D.2
Brodersen, R.B.3
-
39
-
-
0000679218
-
SOS: Synthesis of application-specific heterogeneous multiprocessor systems
-
Prakash, S., Parker, A., 1992. SOS: Synthesis of application-specific heterogeneous multiprocessor systems. J. Parallel & Distributed Computing, 338-351.
-
(1992)
J. Parallel & Distributed Computing
, pp. 338-351
-
-
Prakash, S.1
Parker, A.2
-
40
-
-
0034854528
-
Energy efficient fixed-priority scheduling for real-time systems on variable voltage processors
-
Quan, G., Hu, X. S., 2001. Energy efficient fixed-priority scheduling for real-time systems on variable voltage processors. In Proceedings of the IEEE 38th Design Automation Conference (DAC01), 828-833.
-
(2001)
Proceedings of the IEEE 38th Design Automation Conference (DAC01)
, pp. 828-833
-
-
Quan, G.1
Hu, X.S.2
-
41
-
-
27944466098
-
Minimum energy fixed-priority scheduling for variable voltage processors
-
Quan, G., Hu, X. S., 2002. Minimum energy fixed-priority scheduling for variable voltage processors. In Proceedings of the Design, Automation and Test in Europe Conference (DATE2002), 782-787.
-
(2002)
Proceedings of the Design, Automation and Test in Europe Conference (DATE2002)
, pp. 782-787
-
-
Quan, G.1
Hu, X.S.2
-
43
-
-
7744241457
-
Energy minimization techniques for distributed embedded systems
-
Ph.D. thesis, University of Southampton
-
Schmitz, M. T., 2003. Energy minimization techniques for distributed embedded systems. Ph.D. thesis, University of Southampton.
-
(2003)
-
-
Schmitz, M.T.1
-
45
-
-
84893715933
-
Energy-efficient mapping and scheduling for DVS enabled distributed embedded systems
-
Schmitz, M. T., Al-Hashimi, B. M., Eles, P., 2002. Energy-efficient mapping and scheduling for DVS enabled distributed embedded systems. In Proceedings of the Design, Automation and Test in Europe Conference (DATE2002), 514-521.
-
(2002)
Proceedings of the Design, Automation and Test in Europe Conference (DATE2002)
, pp. 514-521
-
-
Schmitz, M.T.1
Al-Hashimi, B.M.2
Eles, P.3
-
47
-
-
0034483995
-
Power optimization of real-time embedded systems on variable speed processors
-
Shin, Y., Choi, K., Sakurai, T., 2000. Power optimization of real-time embedded systems on variable speed processors. In Proceedings of the IEEE/ACM International Conference on Computer-Aided Design (ICCAD-00), 365-368.
-
(2000)
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design (ICCAD-00)
, pp. 365-368
-
-
Shin, Y.1
Choi, K.2
Sakurai, T.3
-
48
-
-
0027542932
-
A compile-time scheduling heuristic for interconnection-constrained heterogeneous processor architectures
-
(Feb.)
-
Sih, G. C., Lee, E. A., 1993. A compile-time scheduling heuristic for interconnection-constrained heterogeneous processor architectures. IEEE Trans. Parallel and Distributed Systems 4, 2 (Feb.), 175-187.
-
(1993)
IEEE Trans. Parallel and Distributed Systems
, vol.4
, Issue.2
, pp. 175-187
-
-
Sih, G.C.1
Lee, E.A.2
-
49
-
-
0034853734
-
Dynamic voltage scaling and power management for portable systems
-
Simunic, T., Benini, L., Acquaviva, A., Glynn, P., Micheli, G. D., 2001. Dynamic voltage scaling and power management for portable systems. In Proceedings of the IEEE 38th Design Automation Conference (DAC01), 524-529.
-
(2001)
Proceedings of the IEEE 38th Design Automation Conference (DAC01)
, pp. 524-529
-
-
Simunic, T.1
Benini, L.2
Acquaviva, A.3
Glynn, P.4
Micheli, G.D.5
-
50
-
-
0030697742
-
An evolutionary approach to system-level synthesis
-
Teich, J., Blickle, T., Thiele, L., 1997. An evolutionary approach to system-level synthesis. In Proceedings of the 5th International Workshop on Hardware/Software Co-Design Codes/CASHE 97), 167-171.
-
(1997)
Proceedings of the 5th International Workshop on Hardware/Software Co-Design Codes/CASHE 97)
, pp. 167-171
-
-
Teich, J.1
Blickle, T.2
Thiele, L.3
-
51
-
-
0028711545
-
Power analysis of embedded software: A first step towards software power minimization
-
Tiwari, V., Malik, S., Wolfe, A., 1994. Power analysis of embedded software: A first step towards software power minimization. IEEE Trans. VLSI Systems.
-
(1994)
IEEE Trans. VLSI Systems.
-
-
Tiwari, V.1
Malik, S.2
Wolfe, A.3
-
52
-
-
85029600625
-
Scheduling for reduced CPU energy
-
Weiser, M., Welch, B., Demers, A., Shenker, S., 1994. Scheduling for reduced CPU energy. In Proceedings of the USENIX Symposium on Operating Systems Design and Implementation (OSDI), 13-23.
-
(1994)
Proceedings of the USENIX Symposium on Operating Systems Design and Implementation (OSDI)
, pp. 13-23
-
-
Weiser, M.1
Welch, B.2
Demers, A.3
Shenker, S.4
-
53
-
-
0028464667
-
Hardware/software co-design of embedded systems
-
Wolf, W. H., 1994. Hardware/software co-design of embedded systems. In Proceedings of the IEEE, 967-989.
-
(1994)
Proceedings of the IEEE
, pp. 967-989
-
-
Wolf, W.H.1
-
54
-
-
0031166039
-
An architectural co-synthesis algorithm for distributed, embedded computing systems
-
June
-
Wolf, W. H., 1997. An architectural co-synthesis algorithm for distributed, embedded computing systems. IEEE Titans. VLSI Systems 5, 2 (June), 218-229.
-
(1997)
IEEE Titans. VLSI Systems
, vol.5
, Issue.2
, pp. 218-229
-
-
Wolf, W.H.1
-
55
-
-
0025462712
-
Hypertool: A programming aid for message-passing systems
-
July
-
Wu, M., Gajski, D., 1990. Hypertool: A programming aid for message-passing systems. IEEE Trans. Parallel and Distributed Systems 1, 3 (July), 330-343.
-
(1990)
IEEE Trans. Parallel and Distributed Systems
, vol.1
, Issue.3
, pp. 330-343
-
-
Wu, M.1
Gajski, D.2
-
56
-
-
32544441155
-
Allocation and scheduling of conditional task graph in hardware/software co-synthesis
-
Xie, Y., Wolf, W., 2001. Allocation and scheduling of conditional task graph in hardware/software co-synthesis. In Proceedings of the Design, Automation and Test in Europe Conference (DATE2001), 620-625.
-
(2001)
Proceedings of the Design, Automation and Test in Europe Conference (DATE2001)
, pp. 620-625
-
-
Xie, Y.1
Wolf, W.2
-
57
-
-
0036056702
-
Task scheduling and voltage selection for energy minimization
-
Zhang, Y., Hu, X., Chen, D. Z., 2002. Task scheduling and voltage selection for energy minimization. In Proceedings of the IEEE 39th Design Automation Conference (DAC02), 183-188.
-
(2002)
Proceedings of the IEEE 39th Design Automation Conference (DAC02)
, pp. 183-188
-
-
Zhang, Y.1
Hu, X.2
Chen, D.Z.3
|