Dynamic thread block launch: A lightweight execution mechanism to support irregular applications on GPUs

Proceedings - International Symposium on Computer Architecture

Volumn 13-17-June-2015, Issue , 2015, Pages 528-540

  Wang, Jin ^a   Rubin, Norm ^b   Sidelnik, Albert ^b   Yalamanchili, Sudhakar ^a  

^a GEORGIA INSTITUTE OF TECHNOLOGY   (United States)

^b NVIDIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ARTIFICIAL INTELLIGENCE; COMPUTER ARCHITECTURE; LEARNING SYSTEMS; MEMORY ARCHITECTURE; OBJECT ORIENTED PROGRAMMING; PROGRAM PROCESSORS;

BULK SYNCHRONOUS PARALLEL; BULK SYNCHRONOUS PARALLEL MODEL; EXECUTION MODEL; IRREGULAR APPLICATIONS; MICRO ARCHITECTURES; PERFORMANCE POTENTIALS; RELATIONAL DATABASE; RUNTIME SUPPORT;

DYNAMICS;

EID: 84960076275     PISSN: 10636897     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/2749469.2750393     Document Type: Conference Paper

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