-
1
-
-
85008025619
-
Hierarchical instruction windows. In
-
Nov
-
E. Brekelbaum, J. Rupley II, C. Wilkerson, and B. Black. Hierarchical instruction windows. In Intl. Symp, on Microarchitecture, Nov. 2002
-
(2002)
Intl. Symp, on Microarchitecture
-
-
Brekelbaum, E.1
Rupley, J.2
Wilkerson, C.3
Black, B.4
-
2
-
-
2342619439
-
Out-of-order commit processors. In Intl. Symp. on High-Performance Computer Architecture
-
Feb
-
A. Cristal, D. Ortega, J. Llosa and M. Valero. Out-of-order commit processors. In Intl. Symp. on High-Performance Computer Architecture, Feb. 2004
-
(2004)
-
-
Cristal, A.1
Ortega, D.2
Llosa, J.3
Valero, M.4
-
3
-
-
34547399912
-
Kilo-instruction processors. Invited paper. ISHPC-V. In
-
October Lecture Notes in Computer Science (LNCS) 2858
-
A. Cristal, D. Ortega, J. Llosa, M. Valero. Kilo-instruction processors. Invited paper. ISHPC-V. In Intl. Symp. on High Performance Computers, October 2003. Lecture Notes in Computer Science (LNCS) 2858, 2003
-
(2003)
Intl. Symp. on High Performance Computers
-
-
Cristal, A.1
Ortega, D.2
Llosa, J.3
Valero, M.4
-
4
-
-
2342487209
-
Large virtual ROBs by processor checkpointing
-
Universitat Politecnica de Catalunya, July
-
A. Cristal, M. Valero, J. Llosa, and A. Gonzalez. Large virtual ROBs by processor checkpointing. Tech. Rep. UPC-DAC-2002-39, Universitat Politecnica de Catalunya, July 2002
-
(2002)
Tech. Rep. UPC-DAC-2002-39
-
-
Cristal, A.1
Valero, M.2
Llosa, J.3
Gonzalez, A.4
-
7
-
-
4644294548
-
A day in the life of a data cache miss. In Wkshp. on Memory Performance Issues, in conjunction with
-
July
-
T. Karkhanis and J. E. Smith. A day in the life of a data cache miss. In Wkshp. on Memory Performance Issues, in conjunction with Intl. Symp. on Computer Architecture, July 2002
-
(2002)
Intl. Symp. on Computer Architecture
-
-
Karkhanis, T.1
Smith, J.E.2
-
8
-
-
0036286989
-
A large, fast instruction window for tolerating cache misses. In
-
June
-
A. R. Lebeck, J. Koppanalil, T. Li, and J. Patwardhan, and Eric Rotenberg. A large, fast instruction window for tolerating cache misses. In Intl. Symp. on Computer Architecture, June 2002
-
(2002)
Intl. Symp. on Computer Architecture
-
-
Lebeck, A.R.1
Koppanalil, J.2
Li, T.3
Patwardhan, J.4
Rotenberg, E.5
-
9
-
-
2342514653
-
Ephemeral registers
-
Computer Systems Lab, Cornell University, June
-
J. F. Martinez, A. Cristal, M. Valero, and J. Llosa. Ephemeral registers. Tech. Rep. CSL-TR-2003-1035, Computer Systems Lab, Cornell University, June 2003
-
(2003)
Tech. Rep. CSL-TR-2003-1035
-
-
Martinez, J.F.1
Cristal, A.2
Valero, M.3
Llosa, J.4
-
10
-
-
84948992629
-
Cherry: Checkpointed early resource recycling in out-of-order microprocessors.
-
Nov
-
J. F. Martinez, J. Renau, M. C. Huang, M. Prvulovic, and J. Torrellas. Cherry: Checkpointed early resource recycling in out-of-order microprocessors. In Intl. Symp. on Microarchitecture, Nov. 2002
-
(2002)
Intl. Symp. on Microarchitecture
-
-
Martinez, J.F.1
Renau, J.2
Huang, M.C.3
Prvulovic, M.4
Torrellas, J.5
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