ARTNoCs: An evaluation framework for hardware architectures of real-time NoCs

Proceedings - 2016 IEEE 30th International Parallel and Distributed Processing Symposium, IPDPS 2016

Volumn , Issue , 2016, Pages 259-264

  Hesham, Salma ^a,b   Gohringer, Diana ^b   El Ghany, Mohamed Abd ^a,c  

^a German University in Cairo   (Egypt)

^b RUHR UNIVERSITY BOCHUM   (Germany)

^c DARMSTADT UNIVERSITY OF TECHNOLOGY   (Germany)

Author keywords

MPSoC; Networks on Chip; Quality of Service; Real time

Indexed keywords

COMPUTER ARCHITECTURE; EMBEDDED SYSTEMS; HARDWARE; MULTIPROCESSING SYSTEMS; NETWORK ARCHITECTURE; NETWORK-ON-CHIP; QUALITY CONTROL; QUALITY OF SERVICE; REAL TIME SYSTEMS; RECONFIGURABLE HARDWARE; ROUTERS; SYSTEM-ON-CHIP;

ARCHITECTURAL SOLUTIONS; CYBER PHYSICAL SYSTEMS (CPSS); MPSOC; NETWORKS ON CHIPS; PERFORMANCE CRITERION; REAL TIME; REAL TIME CONSTRAINTS; REAL TIME PERFORMANCE EVALUATION;

INTEGRATED CIRCUIT DESIGN;

EID: 84991712997     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IPDPSW.2016.87     Document Type: Conference Paper

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