|
Volumn , Issue , 2002, Pages 338-343
|
Predicting optimal process conditions for flip-chip assembly using copper column bumped dies
|
Author keywords
[No Author keywords available]
|
Indexed keywords
CHIP SCALE PACKAGES;
COPPER;
ELECTRONICS PACKAGING;
STRAIN ENERGY;
COMPUTER MODELLING;
COPPER COLUMNS;
DAMAGE INDICATOR;
DESIGN PARAMETERS;
FLIP CHIP ASSEMBLIES;
OPTIMAL PROCESS;
THERMAL CYCLIC LOADING;
UNDER-BUMP METALLURGIES;
FLIP CHIP DEVICES;
|
EID: 84964675026
PISSN: None
EISSN: None
Source Type: Conference Proceeding
DOI: 10.1109/EPTC.2002.1185694 Document Type: Conference Paper |
Times cited : (13)
|
References (11)
|