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Volumn 4, Issue , 2005, Pages 1805-1814

Turbo-schedule for LDPC decoding

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[No Author keywords available]

Indexed keywords


EID: 84961891785     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (3)

References (10)
  • 2
    • 0033099611 scopus 로고    scopus 로고
    • Good error-correcting codes based on very sparse matrices
    • D. MacKay, "Good error-correcting codes based on very sparse matrices, " Informa-tion Theory, IEEE Transactions on, vol. 45, no. 2, pp. 399-431, 1999.
    • (1999) Informa-tion Theory IEEE Transactions on , vol.45 , Issue.2 , pp. 399-431
    • MacKay, D.1
  • 5
    • 17044383428 scopus 로고    scopus 로고
    • A reduced complexity decoder architecture via layered decoding of LDPC codes
    • Hocevar, D.E., "A reduced complexity decoder architecture via layered decoding of LDPC codes, " in Signal Processing Systems SIPS 2004. IEEE Workshop on, pp. 107-112, 2004.
    • (2004) Signal Processing Systems SIPS 2004 IEEE Workshop on , pp. 107-112
    • Hocevar, D.E.1
  • 7
    • 0035246128 scopus 로고    scopus 로고
    • Analysis of sum-product decoding of low-density parity-check codes using a Gaussian approximation
    • S. Chung, T. Richardson, and R. Urbanke, "Analysis of sum-product decoding of low-density parity-check codes using a Gaussian approximation, " Information The-ory, IEEE Transactions on, vol. 47, no. 2, pp. 657-670, 2001.
    • (2001) Information The-ory IEEE Transactions on , vol.47 , Issue.2 , pp. 657-670
    • Chung, S.1    Richardson, T.2    Urbanke, R.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.