Multiple access caches: Energy implications

Proceedings - IEEE Computer Society Workshop on VLSI 2000: System Design for a System-on-Chip Era, IWV 2000

Volumn , Issue , 2000, Pages 53-58

  Kim, H S ^a   Vijaykrishnan, N ^a   Kandemir, M ^a   Irwin, M J ^a  

^a PENNSYLVANIA STATE UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

APPLICATION SPECIFIC INTEGRATED CIRCUITS; CACHE MEMORY; ENERGY CONSERVATION; ENERGY UTILIZATION; PROGRAM COMPILERS;

ASSOCIATIVE CACHE; BENCHMARK SUITES; CACHE ARCHITECTURE; COMPILER OPTIMIZATIONS; ENERGY EFFICIENT; ENERGY EFFICIENT CODES; MULTIPLE ACCESS; SET ASSOCIATIVE CACHE;

ENERGY EFFICIENCY;

EID: 84961879649     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IWV.2000.844530     Document Type: Conference Paper

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