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Volumn 1673, Issue , 1999, Pages 1-10

Reconfigurable processors for high-performance, embedded digital signal processing

Author keywords

[No Author keywords available]

Indexed keywords

DIGITAL SIGNAL PROCESSORS; RECONFIGURABLE ARCHITECTURES; RECONFIGURABLE HARDWARE;

EID: 84956868075     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/978-3-540-48302-1_1     Document Type: Conference Paper
Times cited : (13)

References (18)
  • 5
    • 0031376640 scopus 로고    scopus 로고
    • The Chimaera reconfigurable functional unit
    • Kenneth L. Pocek and Jeffery Arnold, IEEE Computer Society, IEEE Computer Society Press, April, 2
    • Scott Hauck, Thomas W. Fry, Matthew M. Hosler, and Jeffery P. Kao. The Chimaera reconfigurable functional unit. In Kenneth L. Pocek and Jeffery Arnold, editors, Proceedings of the IEEE Symposium on FPGAs for Custom Computing Machines, pages 87-96. IEEE Computer Society, IEEE Computer Society Press, April 1997. 2
    • (1997) Proceedings of the IEEE Symposium on Fpgas for Custom Computing Machines , pp. 87-96
    • Hauck, S.1    Fry, T.W.2    Hosler, M.M.3    Kao, J.P.4
  • 6
    • 0031360911 scopus 로고    scopus 로고
    • GARP: A MIPS processor with a reconfigurable coprocessor
    • J. Arnold and K. L. Pocek, Napa, CA, April, 2, 6, 7
    • John R. Hauser and John Wawrzynek. GARP: A MIPS processor with a reconfigurable coprocessor. In J. Arnold and K. L. Pocek, editors, Proceedings of IEEE Workshop on FPGAs for Custom Computing Machines, pages 12-21, Napa, CA, April 1997. 2, 6, 7
    • (1997) Proceedings of IEEE Workshop on Fpgas for Custom Computing Machines , pp. 12-21
    • Hauser, J.R.1    John, W.2
  • 13
    • 84947594065 scopus 로고    scopus 로고
    • Exploring optimal cost-performance designs for Raw microprocessors
    • Kenneth L. Pocek and Jeffery M. Arnold, IEEE Computer Society, IEEE Computer Society Press, 4
    • Csaba Andras Moritz, Donald Yeung, and Anant Agarwal. Exploring optimal cost-performance designs for Raw microprocessors. In Kenneth L. Pocek and Jeffery M. Arnold, editors, Proceedings of the IEEE Symposium on FPGAs for Custom Computing Machines (FCCM’98), pages 12-27. IEEE Computer Society, IEEE Computer Society Press, 1998. 4
    • (1998) Proceedings of the IEEE Symposium on Fpgas for Custom Computing Machines (FCCM’98) , pp. 12-27
    • Moritz, C.A.1    Yeung, D.2    Agarwal, A.3
  • 15
    • 0342838370 scopus 로고    scopus 로고
    • Technical report, Berkeley Design Technology, Inc, 6
    • Garrick Blalock. The BDTImark: A measure of DSP execution speed. Technical report, Berkeley Design Technology, Inc., 1997. Available at http://www.bdti.com/articles/wtpaper.htm. 6
    • (1997) The Bdtimark: A Measure of DSP Execution Speed
    • Blalock, G.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.