The influence of the SiN CAP process on the electromigration and stressvoiding performance of dual damascene Cu interconnects

IEEE International Reliability Physics Symposium Proceedings

Volumn 2003-January, Issue , 2003, Pages 146-150

  Von Glasow, A ^a   Fischer, A H ^a   Bunel, D ^b   Friese, G ^a   Hausmann, A ^a   Heitzsch, O ^a   Hommel, M ^a   Kriz, J ^a   Penka, S ^a   Raffm, P ^b   Robin, C ^b   Sperlich, H P ^a   Ungar, F ^a   Zitzclsbcrger, A E ^a  

^a INFINEON TECHNOLOGIES AG   (Germany)

^b ALTIS Semiconductors   (France)

Author keywords

[No Author keywords available]

Indexed keywords

ACTIVATION ENERGY; CHEMICAL ACTIVATION; COPPER; CRYSTAL DEFECTS; CRYSTAL STRUCTURE; DEPOSITION; ECONOMIC AND SOCIAL EFFECTS; ELECTROMIGRATION; PLASMA APPLICATIONS; RELIABILITY; SILICON NITRIDE;

CAP-LAYER DEPOSITIONS; CRYSTAL RECOVERY; DEPOSITION PROCESS; ELECTROMIGRATION FAILURES; MICRO-STRUCTURAL DAMAGES; PLASMA TREATMENT; PROCESS PARAMETERS; RELIABILITY REQUIREMENTS;

INTEGRATED CIRCUIT INTERCONNECTS;

EID: 84955326113     PISSN: 15417026     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/RELPHY.2003.1197735     Document Type: Conference Paper

References (14)

1. N.E. Meier et al., "In situ studies of EM voiding in passivated Cu lines", Stress-Induced Phenomena 1999
2. J. Lloyd et al., "Relationship between Interfacial Adhesion and Electromigration in Cu Metallization", proceedings IRW 2002
3. M. Hatano et al., "EM Lifetime improvement of Cu Damascene Interconnects by P-SiC Layer"; proceedings IITC2002, pp. 212-214
4. J. Martin et al., "Integration of SiCN as a low-k Etch Stop and Cu Passivation in a High Performance low-k Interconnect"; proceedings I1TC2002, pp. 42-44
5. S. Parikh et al., "Defect and Electromigration Characterization of Two level Copper Interconnect", proceedings IITC 2001
6. R. Gonella, STM, "Cu quality and interconnect environment impact on Cu Dual Damascene electromigration performances", 2002 SEMI, Tutorial at the SEMICON Europe
7. C. Goldberg et al., "Interface Reliability of High Performance Interconnects", to be published in proceedings of the Advanced Metallization Conference 2002
8. P. Andricacos, "Copper On-Chip Interconnections", The Electrochemical Society Interface, Spring 1999
9. J.A. Cunningham, "Using electrochemistry to improve copper interconnects", Semiconductor International 5/2000
10. A. von Glasow, A.H. Fischer: "EM and SM investigations on dual damascene Cu interconnects", proceedings AMC 2001, pp. 433-440
11. A.H. Fischer et al., "Electromigration Failure Mechanism Studies on Copper Interconnects", proceedings IITC 2002, pp. 139-141
12. A. von Glasow, et al: "Geometrical aspects of stress-induced voiding in copper interconnects", to be published AMC 2002
13. S. Murarka, "Metallization - Theory and Practice for VLSI and ULSI, Butterworth-Heinemann, Stoneham, MA, pp.41-47
14. A. von Glasow, A.H. Fischer: "Using the temperature coefficient of the resistance (TCR) as Early Reliability Indicator for Stressvoiding Risks in Copper Interconnects", to be published IRPS 2003