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Volumn 2001-January, Issue , 2001, Pages 201-210

Asynchronous embryonics

Author keywords

[No Author keywords available]

Indexed keywords

FAULT TOLERANCE; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); HARDWARE; NASA; RECONFIGURABLE HARDWARE;

EID: 84952924604     PISSN: 15506029     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/EH.2001.937963     Document Type: Conference Paper
Times cited : (9)

References (20)
  • 1
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    • Evolvable Systems: From Biology to Hardware, Proceedings of 1st International Conference (ICES96), Higuchi, T. et al. (eds.), Springer-Verlag
    • Sanchez, E. et al. (1997), "Phylogeny, ontogeny, and epigenesis: Three sources of biological inspiration for softening hardware", Evolvable Systems: From Biology to Hardware, Proceedings of 1st International Conference (ICES96), Lecture notes in Computer Science, 1259, 35-54, Higuchi, T. et al. (eds.), Springer-Verlag.
    • (1997) Lecture Notes in Computer Science , vol.1259 , pp. 35-54
    • Sanchez, E.1
  • 2
    • 0013250672 scopus 로고    scopus 로고
    • D.Phil. Thesis, Bio-inspired and Bio-medical Engineering, The Department of Electronics, The University of York
    • Ortega-Sánchez, C. A. (2000), "Embryonics: A Bio-inspired Fault-tolerant Multicellular System", D.Phil. Thesis, Bio-inspired and Bio-medical Engineering, The Department of Electronics, The University of York: 159.
    • (2000) Embryonics: A Bio-inspired Fault-tolerant Multicellular System , pp. 159
    • Ortega-Sánchez, C.A.1
  • 3
    • 0013188983 scopus 로고    scopus 로고
    • Ph.D. Thesis, Logic Systems Laboratory, Computer Science Department, Swiss Federal Institute of Technology
    • Tempesti, G. (1998), "A Self-Repairing Multiplexer-Based FPGA Inspired by Biological Processes", Ph.D. Thesis, Logic Systems Laboratory, Computer Science Department, Swiss Federal Institute of Technology: 166.
    • (1998) A Self-Repairing Multiplexer-Based FPGA Inspired by Biological Processes , pp. 166
    • Tempesti, G.1
  • 4
    • 0029191713 scopus 로고
    • Asynchronous design methodologies: An overview
    • Hauck, S. (1995), "Asynchronous design methodologies: an overview", Proceedings of the IEEE, 83(1): 69-93.
    • (1995) Proceedings of the IEEE , vol.83 , Issue.1 , pp. 69-93
    • Hauck, S.1
  • 7
    • 0001951703 scopus 로고
    • System Timing
    • Mead, C. et al. (eds.), Addison-Wesley
    • Seitz, C. L. (1980), "System Timing", Introduction to VLSI systems: 218-262, Mead, C. et al. (eds.), Addison-Wesley.
    • (1980) Introduction to VLSI Systems , pp. 218-262
    • Seitz, C.L.1
  • 8
    • 0026821315 scopus 로고
    • Four state asynchronous architectures
    • McAuley, A. J. (1992), "Four state asynchronous architectures", IEEE Transactions on Computers, 41(2): 129-42.
    • (1992) IEEE Transactions on Computers , vol.41 , Issue.2 , pp. 129-142
    • McAuley, A.J.1
  • 9
    • 0034172002 scopus 로고    scopus 로고
    • Toward robust integrated circuits: The embryonics approach
    • Mange, D. et al. (2000), "Toward robust integrated circuits: The embryonics approach", Proceedings of the IEEE, 88(4): 516-43.
    • (2000) Proceedings of the IEEE , vol.88 , Issue.4 , pp. 516-543
    • Mange, D.1
  • 10
    • 80055070799 scopus 로고    scopus 로고
    • A Hardware Implementation of an Embryonic Architecture Using Virtex FPGAs
    • Evolvable systems: from biology to hardware, Proceedings of 3rd International Conference (ICES2000), Miller, J. et al. (eds.), Springer-Verlag
    • Ortega, C. & Tyrrell, A. (2000), "A Hardware Implementation of an Embryonic Architecture Using Virtex FPGAs", Evolvable systems: from biology to hardware, Proceedings of 3rd International Conference (ICES2000), Lecture notes in Computer Science, 1801, 155-164, Miller, J. et al. (eds.), Springer-Verlag.
    • (2000) Lecture Notes in Computer Science , vol.1801 , pp. 155-164
    • Ortega, C.1    Tyrrell, A.2
  • 11
    • 0027641441 scopus 로고
    • Using FPGAs to implement self-timed systems
    • Brunvand, E. (1993), "Using FPGAs to implement self-timed systems", Journal of VLSI Signal Processing, 6(2): 173-90.
    • (1993) Journal of VLSI Signal Processing , vol.6 , Issue.2 , pp. 173-190
    • Brunvand, E.1
  • 12
    • 0003557110 scopus 로고    scopus 로고
    • Ph. D. Thesis, Department of Computer Science, Faculty of Science & Engineering, The University of Manchester
    • Bardsley, A. (2000), "Implementing Balsa Handshake Circuits", Ph. D. Thesis, Department of Computer Science, Faculty of Science & Engineering, The University of Manchester: 187.
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  • 14
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    • Ph.D. Thesis, Institute for Computing Systems Architecture (ICSA), Division of Informatics, University of Edinburgh
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    • Payne, R.1
  • 17
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    • (1998) Lecture Notes in Computer Science , vol.1478 , pp. 311-322
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  • 19
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.