Predicting conditional branches with fusion-based hybrid predictors

Parallel Architectures and Compilation Techniques - Conference Proceedings, PACT

Volumn 2002-January, Issue , 2002, Pages 165-176

  Loh, G H ^a   Henry, D S ^a,b  

^a YALE UNIVERSITY   (United States)

^b Yale University   (United States)

Author keywords

Accuracy; Clocks; Computer science; Cost function; Fuses; Machine learning; Microarchitecture; Resumes; Space exploration; Throughput

Indexed keywords

ARTIFICIAL INTELLIGENCE; CLOCKS; COMPUTER SCIENCE; COST FUNCTIONS; ELECTRIC FUSES; LEARNING SYSTEMS; MACHINE COMPONENTS; PARALLEL ARCHITECTURES; SPACE RESEARCH; THROUGHPUT;

ACCURACY; CONDITIONAL BRANCH; HYBRID PREDICTORS; MICRO ARCHITECTURES; PREDICTION ACCURACY; RESUMES; SELECTION MECHANISM; SPACE EXPLORATIONS;

FORECASTING;

EID: 84948766879     PISSN: 1089795X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/PACT.2002.1106015     Document Type: Conference Paper

References (32)

1. Doug Burger and Todd M. Austin. The SimpleScalar Tool Set, Version 2.0. Technical Report 1342, University of Wisconsin, June 1997.
2. P. Chang and U. Banerjee. Profile-Guided Multi-Heuristic Branch Prediction. In Proceedings of the International Conference on Parallel Processing Vol. I, volume 1, pages 215-218, Urbana-Campaign, IL, USA, August 1995.
3. Po-Yung Chang, Eric Hao, and Yale N. Patt. Alternative Implementations of Hybrid Branch Predictors. In Proceedings of the 28th International Symposium on Microarchitecture, pages 252-257, Ann Arbor, MI, USA, November 1995.
4. Po-Yung Chang, Eric Hao, Tse-Yu Yeh, and Yale N. Patt. Branch Classification: a New Mechanism for Improving Branch Predictor Performance. In Proceedings of the 27th International Symposium on Microarchitecture, pages 22-31, San Jose, CA, USA, November 1994.
5. Avinoam N. Eden and Trevor N. Mudge. The YAGS Branch Prediction Scheme. In Proceedings of the 31st International Symposium on Microarchitecture, pages 69-77, Dallas, TX, USA, December 1998.
6. Joel Emer and Nikolas Gloy. A Language for Describing Predictors and it Application to Automatic Synthesis. In Proceedings of the 24th International Symposium on Computer Architecture, pages 304-314, Boulder, CO, USA, June 1997.
7. Marius Evers. Improving Branch Prediction by Understanding Branch Behavior. PhD thesis, University of Michigan, 2000.
8. Marius Evers, Po-Yung Chang, and Yale N. Patt. Using Hybrid Branch Predictors to Improve Branch Prediction Accuracy in the Presence of Context Switches. In Proceedings of the 23rd International Symposium on Computer Architecture, pages 3-11, Philadelphia, PA, USA, May 1996.
9. Dirk Grunwald, Donald Lindsay, and Benjamin Zorn. Static Methods in Hybrid Branch Prediction. In Proceedings of the International Conference on Parallel Architectures and Compilation Techniques, pages 222-229, Paris, France, October 1998.
10. Glenn Hinton, Dave Sager, Mike Upton, Darrell Boggs, Doug Karmean, Alan Kyler, and Patrice Roussel. The Microarchitecture of the Pentium 4 Processor. Intel Technology Journal, Q1 2001.
11. John H. Holland. Adaptation in Natural Artificial Systems. University of Michigan Press, Ann Arbor, MI, 1975.
12. Erik Jacobson, Eric Rotenberg, and James E. Smith. Assigning Confidence to Conditional Branch Predictions. In Proceedings of the 29th International Symposium on Microarchitecture, pages 142-152, Paris, France, December 1996.
13. Daniel Jiménez. Delay-Sensitive Branch Predictors for Future Technologies. PhD thesis, University of Texas at Austin, January 2002.
14. Daniel A. Jiménez, Stephen W. Keckler, and Calvin Lin. The Impact of Delay on the Design of Branch Predictors. In Proceedings of the 33rd International Symposium on Microarchitecture, pages 4-13, Monterey, CA, USA, December 2000.
15. Daniel A. Jiménez and Calvin Lin. Dynamic Branch Prediction with Perceptrons. In Proceedings of the 7th International Symposium on High Performance Computer Architecture, pages 197-206, Monterrey, Mexico, January 2001.
16. Toni Juan, Sanji Sanjeevan, and Juan J. Navarro. Dynamic History-Length Fitting: A third level of adaptivity for branch prediction. In Proceedings of the 25th International Symposium on Computer Architecture, pages 156-166, Barcelona, Spain, June 1998.
17. Eric Larson, Saugata Chatterjee, and Todd Austin. MASE: A Novel Infrastructure for Detailed Microarchitectural Modeling. In Proceedings of the 2001 International Symposium on Performance Analysis of Systems and Software, Tucson, AZ, USA, November 2001.
18. Chih-Chieh Lee, I-Cheng K. Chen, and Trevor N. Mudge. The Bi-Mode Branch Predictor. In Proceedings of the 30th International Symposium on Microarchitecture, pages 4-13, Research Triangle Park, NC, USA, December 1997.
19. Mikko H. Lipasti and John Paul Shen. Exceeding the Dataflow Limit via Value Prediction. In Proceedings of the 29th International Symposium on Microarchitecture, pages 226-237, Paris, France, December 1996.
20. Nick Littlestone and Manfred K. Warmuth. The Weighted Majority Algorithm. Information and Computation, 108:212-261, 1994.
21. Srilatha Manne, Artur Klauser, and Dirk Grunwald. Branch Prediction using Selective Branch Inversion. In Proceedings of the International Conference on Parallel Architectures and Compilation Techniques, pages 81-110, Newport Beach, CA, USA, October 1999.
22. Scott McFarling. Combining Branch Predictors. TN 36, Compaq Computer Corporation Western Research Laboratory, June 1993.
23. Pierre Michaud, Andre Seznec, and Richard Uhlig. Trading Conflict and Capacity Aliasing in Conditional Branch Predictors. In Proceedings of the 24th International Symposium on Computer Architecture, pages 292-303, Boulder, CO, USA, June 1997.
24. Andreas Moshovos, Scott E. Breach, T. N. Vijaykumar, and Gurindar S. Sohi. Dynamic Speculation and Synchronization of Data Dependences. In Proceedings of the 24th International Symposium on Computer Architecture, pages 181-193, Boulder, CO, USA, June 1997.
25. Andreas Moshovos and Gurindar S. Sohi. Streamlining Inter-operation Memory Communication via Data Dependence Prediction. In Proceedings of the 30th International Symposium on Microarchitecture, pages 235-245, Research Triangle Park, NC, USA, December 1997.
26. Kevin Skadron, Margaret Martonosi, and Douglas W. Clark. Alloyed Global and Local Branch History: A Robust Solution to Wrong-History Mispredictions. In Proceedings of the International Conference on Parallel Architectures and Compilation Techniques, pages 199-206, Philadelphia, PA, USA, October 2000.
27. Jim E. Smith. A Study of Branch Prediction Strategies. In Proceedings of the 8th International Symposium on Computer Architecture, pages 135-148, Minneapolis, MN, USA, May 1981.
28. Eric Sprangle and Doug Carmean. Increasing Processor Performance by Implementing Deeper Pipelines. In Proceedings of the 29th International Symposium on Computer Architecture, pages 25-34, Anchorage, Alaska, May 2002.
29. Eric Sprangle, Robert S. Chappell, Mitch Alsup, and Yale N. Patt. The Agree Predictor: A Mechanism for Reducing Negative Branch History Interference. In Proceedings of the 24th International Symposium on Computer Architecture, pages 284-291, Boulder, CO, USA, June 1997.
30. Jared Stark, Marius Evers, and Yale N. Patt. Variable Length Path Branch Prediction. ACM SIGPLAN Notices, 33(11):170-179, 1998.
31. The Standard Performance Evaluation Corporation. WWW Site. http://www.spec.org.
32. Tse-Yu Yeh and Yale N. Patt. Two-Level Adaptive Branch Prediction. In Proceedings of the 24th International Symposium on Microarchitecture, pages 51-61, Albuqueque, NM, USA, November 1991.