Interconnect-aware mapping of applications to coarse-grain reconfigurable architectures

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

Volumn 3203, Issue , 2004, Pages 891-899

  Bansal, Nikhil ^a   Gupta, Sumit ^b   Dutt, Nikil ^a   Nicolau, Alex ^a   Gupta, Rajesh ^c  

^a UNIVERSITY OF CALIFORNIA   (United States)

^b Tallwood Venture Capital   (United States)

^c UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COST FUNCTIONS; DATA TRANSFER; MAPPING; NETWORK ARCHITECTURE;

COARSE-GRAIN ARCHITECTURE; COARSE-GRAIN RECONFIGURABLE ARCHITECTURES; LOWER BOUNDS; MAPPING APPLICATIONS; OPERATION COST; PRIORITY-BASED; PROCESSING ELEMENTS;

RECONFIGURABLE ARCHITECTURES;

EID: 84947902367     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/978-3-540-30117-2_95     Document Type: Conference Paper

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