Refresh-free dynamic standard-cell based memories: Application to a QC-LDPC decoder

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn 2015-July, Issue , 2015, Pages 1426-1429

  Meinerzhagen, Pascal ^a,b   Bonetti, Andrea ^a   Karakonstantis, Georgios ^a   Roth, Christoph ^c   Giirkaynak, Frank ^c   Burg, Andreas ^a  

^a EPFL   (Switzerland)

^b Intel Research Cambridge Lab   (United Kingdom)

^c ETH ZURICH   (Switzerland)

Author keywords

[No Author keywords available]

Indexed keywords

DECODING; MEMORY ARCHITECTURE;

EMBEDDED MEMORY; FREE DYNAMICS; IEEE 802.11N STANDARDS; INFORMATION BIT; INTERNAL MEMORY; LOW DENSITY PARITY CHECK DECODERS (LDPC); MEMORY ACCESS; RELIABLE OPERATION;

IEEE STANDARDS;

EID: 84946223844     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISCAS.2015.7168911     Document Type: Conference Paper

References (15)

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