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Volumn , Issue , 2004, Pages

Data Centric Cache Measurement on the Intel ltanium 2 Processor

Author keywords

[No Author keywords available]

Indexed keywords

2 PERFORMANCE; CACHE BEHAVIOR; CACHE MEASUREMENTS; DATA CENTRIC; HARDWARE PERFORMANCE COUNTERS; PERFORMANCE TUNING; PROCESSOR SPEED; RUNNING TIME;

EID: 84934311794     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/SC.2004.21     Document Type: Conference Paper
Times cited : (18)

References (29)
  • 2
    • 84934307841 scopus 로고    scopus 로고
    • IA-32 intel architecture software developer's manual, volume 1: Basic architecture
    • IA-32 Intel Architecture Software Developer's Manual, Volume 1: Basic Architecture. Intel, Intel Order Number 253665, 2004.
    • (2004) Intel, Intel Order Number 253665
  • 9
    • 84877037316 scopus 로고    scopus 로고
    • Using hardware performance monitors to isolate memory bottlenecks
    • Dallas, TX
    • Buck, B. R. and Hollingsworth, J. K., Using Hardware Performance Monitors to Isolate Memory Bottlenecks. In Proceedings of SC2000, (Dallas, TX, 2000).
    • (2000) Proceedings of SC2000
    • Buck, B.R.1    Hollingsworth, J.K.2
  • 13
  • 14
    • 0027242764 scopus 로고    scopus 로고
    • MTOOL: An integrated system for performance debugging shared memory multiprocessor applications
    • Goldberg, A. J. and Hennessy, J. L. MTOOL: An Integrated System for Performance Debugging Shared Memory Multiprocessor Applications. IEEE Transactions on Parallel and Distributed Systems, 4 (1). 28-40.
    • IEEE Transactions on Parallel and Distributed Systems , vol.4 , Issue.1 , pp. 28-40
    • Goldberg, A.J.1    Hennessy, J.L.2
  • 15
    • 0034226001 scopus 로고    scopus 로고
    • SPEC CPU2000: Measuring CPU performane in the new millenium
    • Henning, J. L. SPEC CPU2000: Measuring CPU Performane in the New Millenium. Computer, 33 (7). 28-35.
    • Computer , vol.33 , Issue.7 , pp. 28-35
    • Henning, J.L.1
  • 19
    • 0032630821 scopus 로고    scopus 로고
    • UltraSPARC-III: Designing third generation 64-bit performance
    • Lauterbach, G. and Horel, T. UltraSPARC-III: Designing Third Generation 64-Bit Performance. IEEE Micro, 19 (3). 73-85.
    • IEEE Micro , vol.19 , Issue.3 , pp. 73-85
    • Lauterbach, G.1    Horel, T.2
  • 20
    • 0028517833 scopus 로고    scopus 로고
    • Cache profiling and the SPEC benchmarks: A case study
    • Lebeck, A. R. and Wood, D. A. Cache Profiling and the SPEC Benchmarks: A Case Study. IEEE Computer, 27 (9). 15-26.
    • IEEE Computer , vol.27 , Issue.9 , pp. 15-26
    • Lebeck, A.R.1    Wood, D.A.2
  • 27
    • 0034275098 scopus 로고    scopus 로고
    • Itanium processor microarchitecture
    • Sharangpani, H. and Arora, K. Itanium Processor Microarchitecture. IEEE Micro, 20 (5). 24-43.
    • IEEE Micro , vol.20 , Issue.5 , pp. 24-43
    • Sharangpani, H.1    Arora, K.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.