High density, aspect ratio through-wafer electrical interconnect vias for low cost, generic modular MEMS packaging

2002 Proceedings - 8th International Advanced Packaging Materials Symposium

Volumn , Issue , 2002, Pages 8-11

  Ok, Seong Joon ^a   Baldwin, Daniel ^a  

^a GEORGIA INSTITUTE OF TECHNOLOGY   (United States)

Author keywords

MEMS packaging; Through wafer vias

Indexed keywords

ASPECT RATIO; COSTS; MEMS; MICROSYSTEMS; PACKAGING MATERIALS; SILICON WAFERS;

ELECTRICAL INTERCONNECTIONS; ELECTRICAL INTERCONNECTS; FUNCTIONAL REQUIREMENT; MEMS PACKAGING; MICRO ELECTROMECHANICAL SYSTEM (MEMS); MICRO-SYSTEM PACKAGING; SPACE EFFICIENCIES; THROUGH-WAFER VIAS;

ELECTRONICS PACKAGING;

EID: 84929886227     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISAPM.2002.990358     Document Type: Conference Paper

References (5)

1. Ramesham, R.; Ghaffarian, R. "Challenges in interconnection and packaging of microelectromechanical systems" 2000 Proceedings. 50th Electronic Components and Technology Conference p. 666-75, 2000
2. G. Kelly, J. Alderman, C. Lynden, J. Barrett. Microsystem packaging: lessons from conventional low cost IC packaging. J. Micromech. Microeng. 7 p. 99-103, 1997
3. P. Dressendorfer, D. Peterson, C. Reber. "MEMS Packaging - Current Issues and Approaches" 2000 International Conference o High-Density Interconnect and Systems Packaging p. 208-213, 2000
4. Cheng, C.H.; Chow, E.M.; Xuecheng Jin; Sanli Ergun; Khuri-Yakub, B.T. Schneider, S.C.; Levy, M.; McAvoy, B.R. "An efficient electrical addressing method using through wafer vias for two-dimensional ultrasonic arrays" 2000 IEEE Ultrasonics Symposium. Proceedings. An International Symposium p. 1179-82 Vol. 2, 2000
5. Martin J. Walker, Comparison of Bosch and crygenic processes for patterning high aspect ratio features in silicon, Oxford Instrument Plasma Technology. Web: http://www.oxford-instruments.com