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Volumn , Issue , 2006, Pages

ACL2-based verification of the communications in the hermes network on chip

Author keywords

[No Author keywords available]

Indexed keywords

COMPLEX NETWORKS; MICROPROCESSOR CHIPS; THEOREM PROVING; VLSI CIRCUITS;

EID: 84922960075     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (2)

References (18)
  • 1
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    • AC
    • [AC] http://www.cs.utexas.edu/users/moore/acl2/.
  • 2
    • 0000169247 scopus 로고    scopus 로고
    • Acl2 theorems about commercial microprocessors
    • BK+96
    • [BK+96] B.Brock, M.Kaufmann, J Moore: "ACL2 Theorems about Commercial Microprocessors", Proc. FMCAD'96, 1996.
    • (1996) Proc. FMCAD'96
    • Brock, B.1    Kaufmann, M.2    Moore, J.3
  • 4
    • 36348964510 scopus 로고    scopus 로고
    • Elements of verification
    • Du05, March 25
    • [Du05] Rohit Dubey: "Elements of Verification", SOC Central : White paper, March 25, 2005.
    • (2005) SOC Central : White Paper
    • Dubey, R.1
  • 5
    • 84908324742 scopus 로고    scopus 로고
    • HE
    • [HE] http://toledo.inf.pucrs.br/~gaph/Projects/Hermes/Hermes.html.
  • 6
    • 3042559894 scopus 로고    scopus 로고
    • Xpipescompiler: A tool for instantiating application specific networks on chip
    • JM+04, Feb
    • [JM+04] A.Jalabert, S.Murali, L.Benini, G.De Micheli: "xpipesCompiler: A tool for instantiating application specific Networks on Chip", Proc DATE'04, Feb. 2004.
    • (2004) Proc DATE'04
    • Jalabert, A.1    Murali, S.2    Benini, L.3    De Micheli, G.4
  • 9
    • 0036760592 scopus 로고    scopus 로고
    • An interconnect architecture for networking systems on chips
    • KN+02, September
    • [KN+02] F.Karim, A.Nguyen, S.Dey: "An Interconnect Architecture for Networking Systems on Chips", IEEE Micro, Vol. 22, ! issue 5, !September 2002.
    • (2002) IEEE Micro , vol.22 , Issue.5
    • Karim, F.1    Nguyen, A.2    Dey, S.3
  • 10
    • 84908320530 scopus 로고    scopus 로고
    • Energy, fault-tolerance, and scalability issues in designing network-on-chip
    • Ma04, Yokohama (Japan), Jan
    • [Ma04] Radu Marculescu: "Energy, Fault-Tolerance, and Scalability Issues in Designing Network-on-Chip", tutorial at ASP-DAC'04, Yokohama (Japan), Jan. 2004.
    • (2004) Tutorial at ASP-DAC'04
    • Marculescu, R.1
  • 11
    • 9544237156 scopus 로고    scopus 로고
    • Hermes: An infrastructure for low area overhead packet-switching networks on chip
    • MC+04
    • [MC+04] Fernando Moraes, Ney Calazans, Aline Mello, Leandro Möller, Luciano Ost: "HERMES: An infrastructure for low area overhead packet-switching networks on chip", the VLSI Journal, vol. 38-1, 2004.
    • (2004) The VLSI Journal , vol.38-41
    • Moraes, F.1    Calazans, N.2    Mello, A.3    Möller, L.4    Ost, L.5
  • 12
    • 33747097418 scopus 로고    scopus 로고
    • A mechanically checked proof of the correctness of the kernel of the amd5k86 floating-point division algorithm
    • ML+98, September
    • [ML+98] J Moore, T.Lynch, M.Kaufmann: "A Mechanically Checked Proof of the Correctness of the Kernel of the AMD5K86 Floating-Point Division Algorithm", IEEE Trans. on Computers, 47(9), September 1998.
    • (1998) IEEE Trans. on Computers , vol.47 , Issue.9
    • Moore, J.1    Lynch, T.2    Kaufmann, M.3
  • 13
    • 36349006124 scopus 로고    scopus 로고
    • Symbolic simulation: An ACL2 approach
    • Mo98, Springer-Verlag LNCS 1522, November
    • [Mo98] J Moore: "Symbolic Simulation: An ACL2 Approach", Proc. FMCAD'98, Springer-Verlag LNCS 1522, November 1998.
    • (1998) Proc. FMCAD'98
    • Moore, J.1
  • 14
    • 27344437058 scopus 로고    scopus 로고
    • Design, synthesis, and test of networks on chips
    • PG+05, September
    • [PG+05] Partha P. Pande, Cristian Grecu, Andre Ivanov, Resve Saleh, Giovanni De Micheli : "Design, Synthesis, and Test of Networks on Chips", IEEE Design & Test, Vol. 22, issue 5, September 2005.
    • (2005) IEEE Design & Test , vol.22 , Issue.5
    • Pande, P.P.1    Grecu, C.2    Ivanov, A.3    Saleh, R.4    Micheli, G.D.5
  • 17
    • 33751401331 scopus 로고    scopus 로고
    • Deadlock-free routing and component placement for irregular mesh-based networks-on-chip
    • SH+05, San Jose, November, IEEE Computer Society
    • [SH+05] Martin Schäfer, Thomas Hollstein, Heiko Zimmer and Manfred Glesner: "Deadlock-free routing and Component placement for irregular mesh-based networks-on-chip", Proc. ICCAD 2005, San Jose, November 2005, IEEE Computer Society.
    • (2005) Proc. ICCAD 2005
    • Schäfer, M.1    Hollstein, T.2    Zimmer, H.3    Glesner, M.4
  • 18
    • 84908351792 scopus 로고    scopus 로고
    • Packet-switching network-on-chip features exploration and characterization
    • SR+05
    • [SR+05] G.Sassatelli, S.Riso, L.Torres, M.Robert: "Packet-switching Network-On-Chip Features Exploration and Characterization", Proc. VLSI-SOC 2005.
    • (2005) Proc. VLSI-SOC
    • Sassatelli, G.1    Riso, S.2    Torres, L.3    Robert, M.4


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.