Ultra thin gate oxides for 0.1μm heterojunction CMOS applications by the use of a sacrifical Si layer

European Solid-State Device Research Conference

Volumn , Issue , 1998, Pages 608-611

  Loo, R ^a   Caymax, M ^a   Verheyen, P ^a   Conard, T ^a   Bender, H ^a   Vandervorst, W ^a,b   Collaert, N ^a   De Meyer, K ^a   Alkemade, P ^c   Szendro, I ^d  

^a IMEC   (Belgium)

^b UNIVERSITY OF LEUVEN   (Belgium)

^c DELFT UNIVERSITY OF TECHNOLOGY   (Netherlands)

^d MicroVacuurfl Ltd   (Hungary)

Author keywords

[No Author keywords available]

Indexed keywords

GERMANIUM; HETEROJUNCTIONS; OXIDATION; PILES;

CAP LAYER THICKNESS; DIRECT OXIDATION; EPITAXIALLY GROWN; OXIDATION CONDITIONS; OXIDATION FRONT; OXIDATION RATES; ULTRA THIN GATE OXIDE; ULTRA-THIN;

SILICON;

EID: 84908216593     PISSN: 19308876     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

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