A hybrid analog/digital Spike-Timing Dependent Plasticity learning circuit for neuromorphic VLSI multi-neuron architectures

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn , Issue , 2014, Pages 854-857

  Mostafa, Hesham ^a   Corradi, Federico ^a   Stefanini, Fabio ^a   Indiveri, Giacomo ^a  

^a UNIVERSITY OF ZURICH   (Switzerland)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; DIGITAL STORAGE; LEARNING SYSTEMS; LOW POWER ELECTRONICS; NEURAL NETWORKS; STOCHASTIC SYSTEMS; TIMING CIRCUITS;

BI-STABLE STATE; LEARNING ABILITIES; LEARNING CIRCUIT; LOW-POWER CIRCUIT; NEUROMORPHIC VLSI; SPIKE-TIMING-DEPENDENT PLASTICITY; STOCHASTIC LEARNING; SYNAPTIC PLASTICITY;

VLSI CIRCUITS;

EID: 84907398151     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISCAS.2014.6865270     Document Type: Conference Paper

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