A 3.4-pj feram-enabled d flip-flop in 0.13-μm CMOS for nonvolatile processing in digital systems

IEEE Journal of Solid-State Circuits

Volumn 49, Issue 1, 2014, Pages 202-211

  Qazi, Masood ^a   Amerasekera, Ajith ^b   Chandrakasan, Anantha P ^c  

^a CYPRESS SEMICONDUCTOR   (United States)

^b TEXAS INSTRUMENTS   (United States)

^c USA   (United States)

Author keywords

Digital electronics; Embedded systems; Energy harvesting; Ferroelectric random access memory (FeRAM); Latches; Low power electronics; Nonvolatile memory; Registers

Indexed keywords

DIGITAL ELECTRONICS; EMBEDDED SYSTEM APPLICATIONS; ENERGY AVAILABILITY; FERROELECTRIC CAPACITORS; FERROELECTRIC RANDOM ACCESS MEMORY; NON-VOLATILE MEMORY; POWER MANAGEMENT UNIT; REGISTERS;

EMBEDDED SYSTEMS; ENERGY HARVESTING; FERROELECTRIC DEVICES; FLIP FLOP CIRCUITS; INTEGRATED CIRCUITS; POWER ELECTRONICS; RESTORATION;

RANDOM ACCESS STORAGE;

EID: 84891633749     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2013.2282112     Document Type: Article

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