The circuit design of multiple-valued logic voltage-mode adders

ISCAS 2001 - 2001 IEEE International Symposium on Circuits and Systems, Conference Proceedings

Volumn 4, Issue , 2001, Pages 162-165

  Thoidis, I M ^a   Soudris, D ^a   Fernandez, J M ^b   Thanailakis, A ^a  

^a DEMOCRITUS UNIVERSITY OF THRACE   (Greece)

^b NXP SEMICONDUCTORS   (Netherlands)

Author keywords

[No Author keywords available]

Indexed keywords

CARRY LOOKAHEAD ADDER; CIRCUIT DESIGNS; CURRENT FLOWS; MULTIPLE VALUED LOGIC; STATIC-POWER DISSIPATION; STEADY STATE; TRANSISTOR COUNT; VOLTAGE MODE;

INTEGRATED CIRCUIT MANUFACTURE; MANY VALUED LOGICS;

ADDERS;

EID: 84888069093     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISCAS.2001.922197     Document Type: Conference Paper

References (10)

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10. Watanabe, T. Matsumoto. M. And Li T., CMOS four-valued logic circuits using charge-control technique. 18th Int. Symposium on Multiple-Valued Logic, 1988, pp. 90-97.