Planarization process for transparent polyimide coatings to reduce topography and overburden variation

2007 International Conference on Compound Semiconductor Manufacturing Technology, CS MANTECH 2007

Volumn , Issue , 2007, Pages 195-198

  Shih, Wu Sheng ^a   Yota, Jiro ^b   Ly, Hoa ^b   Itchhaporia, Ketan ^a   Smith, Alex ^a  

^a BREWER SCIENCE INC   (United States)

^b SKYWORKS SOLUTIONS INC   (United States)

Author keywords

GaAs HBT; Interlayer dielectrics; Planarization; Polyimide

Indexed keywords

DOWNSTREAM PROCESS; GAAS HBT; GAAS HETEROJUNCTION BIPOLAR TRANSISTORS; INTER-LAYER DIELECTRICS; MANUFACTURING PROCESS; PLANARIZATION; PLANARIZATION PROCESS; TRANSPARENT POLYIMIDES;

GALLIUM ARSENIDE; HETEROJUNCTION BIPOLAR TRANSISTORS; SEMICONDUCTING GALLIUM; SEMICONDUCTOR DEVICE MANUFACTURE; SURFACE TOPOGRAPHY;

POLYIMIDES;

EID: 84887484764     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

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