An improved aVLSI axon with programmable delay using spike timing dependent delay plasticity

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn , Issue , 2013, Pages 1592-1595

  Wang, Runchun ^a   Cohen, Gregory ^a   Hamilton, Tara Julia ^a   Tapson, Jonathan ^a   Van Schaik, Andre ^a  

^a WESTERN SYDNEY UNIVERSITY   (Australia)

Author keywords

analogue memory; analogue VLSI; axonal propagation delay; spike timing dependent delay adaptation

Indexed keywords

ANALOGUE MEMORY; ANALOGUE VLSI; BUILDING BLOCKES; PROGRAMMABLE DELAY; PROPAGATION DELAYS; SPIKE TIMING; SPIKING NEURAL NETWORKS; VOLTAGE DOMAINS;

NEURAL NETWORKS;

VLSI CIRCUITS;

EID: 84883392520     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISCAS.2013.6572165     Document Type: Conference Paper

References (7)

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7. R. Wang, G. Cohen, K. M. Stiefel, J. Tapson, T. J. Hamilton, and A. van Schaik, "An FPGA implementation of polychronous neural network with delay adaptation," to appear in Frontiers in Neuromorphic Engineering, Feb. 2013.