Design optimisation of front-end neural interfaces for spike sorting systems

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn , Issue , 2013, Pages 2501-2504

  Barsakcioglu, Deren Y ^a   Eftekhar, Amir ^a   Constandinou, Timothy G ^a  

^a IMPERIAL COLLEGE LONDON   (United Kingdom)

Author keywords

[No Author keywords available]

Indexed keywords

DATA CONVERTER RESOLUTION; DESIGN OPTIMISATION; DESIGN PARAMETERS; KEY DESIGN PARAMETERS; NEURAL INTERFACES; POWER REQUIREMENT; PRINCIPLE COMPONENT ANALYSIS; RESOURCE EFFICIENCIES;

DESIGN; PRINCIPAL COMPONENT ANALYSIS; TEMPLATE MATCHING;

SORTING;

EID: 84883374646     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISCAS.2013.6572387     Document Type: Conference Paper

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