Suppressing Vt and Gm variability of FinFETs using amorphous metal gates for 14 nm and beyond

Technical Digest - International Electron Devices Meeting, IEDM

Volumn , Issue , 2012, Pages

  Matsukawa, Takashi ^a   Liu, Yongxun ^a   Mizubayashi, Wataru ^a   Tsukada, Junichi ^a   Yamauchi, Hiromi ^a   Endo, Kazuhiko ^a   Ishikawa, Yuki ^a   O'Uchi, Shin Ichi ^a   Ota, Hiroyuki ^a   Migita, Shinji ^a   Morita, Yukinori ^a   Masahara, Meishoku ^a  

^a NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY AIST   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

AMORPHOUS METALS; FINFETS; INTERFACE TRAPS; METAL GATE; ON-CURRENTS; POLYCRYSTALLINE; TIN GATES; UNDOPED CHANNELS;

ELECTRON DEVICES; INTEGRATED CIRCUITS;

MOSFET DEVICES;

EID: 84876109905     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IEDM.2012.6479002     Document Type: Conference Paper

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