Logic optimization of unidirectional circuits with structural methods

Proceedings - 7th International On-Line Testing Workshop, IOLTW 2001

Volumn 2001-January, Issue , 2001, Pages 43-47

  Entrena, Luis ^a   Lbpez, Celia ^a   Olias, Emilio ^a   Millin, Enrique San ^a   Espejo, José A ^a  

^a UNIVERSIDAD CARLOS III DE MADRID   (Spain)

Author keywords

[No Author keywords available]

Indexed keywords

CONSTRAINED OPTIMIZATION; LOGIC CIRCUITS; LOGIC SYNTHESIS; STRUCTURAL OPTIMIZATION; TIMING CIRCUITS;

AREA OVERHEAD; LOGIC OPTIMIZATION; SELF CHECKING; STRUCTURAL METHODS; TARGET CIRCUITS;

COMPUTER CIRCUITS;

EID: 84874787693     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/olt.2001.937816     Document Type: Conference Paper

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