A new design method for self-checking unidirectional combinational circuits

Journal of Electronic Testing: Theory and Applications (JETTA)

Volumn 12, Issue 1-2, 1998, Pages 41-53

  Saposhnikov, V V ^a   Morosov, A ^b   Saposhnikov, Vl V ^a   Gossel M ^b  

^a EMPEROR ALEXANDER I ST PETERSBURG STATE TRANSPORT UNIVERSITY   (Russian Federation)

^b UNIVERSITY OF POTSDAM   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

CODES (SYMBOLS); DETECTOR CIRCUITS; LOGIC DESIGN; LOGIC GATES;

SELF CHECKING UNIDIRECTIONAL COMBINATIONAL CIRCUITS;

COMBINATORIAL CIRCUITS;

EID: 0031998141     PISSN: 09238174     EISSN: None     Source Type: Journal    
DOI: 10.1023/a:1008257118423     Document Type: Article

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